fix(tc): modify ethernet configuration for TC4 FPGA
Modify ethernet base addr and irq numbers for TC4 FPGA in dts to match
with its RoS configuration.
Change-Id: I7b180c3eb90d7557d0011a25a742106f703cd264
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Icen.Zeyada <Icen.Zeyada2@arm.com>
diff --git a/fdts/tc4.dts b/fdts/tc4.dts
index 14bd241..ab93391 100644
--- a/fdts/tc4.dts
+++ b/fdts/tc4.dts
@@ -20,15 +20,16 @@
#define RSE_MHU_TX_ADDR 49020000 /* hex */
#define RSE_MHU_RX_ADDR 49030000 /* hex */
+#if TARGET_FLAVOUR_FVP
#define ETHERNET_ADDR 64000000
#define ETHERNET_INT 799
-
-#if TARGET_FLAVOUR_FVP
#define SYS_REGS_ADDR 60080000
#define MMC_ADDR 600b0000
#define MMC_INT_0 778
#define MMC_INT_1 779
#else /* TARGET_FLAVOUR_FPGA */
+#define ETHERNET_ADDR 18000000
+#define ETHERNET_INT 109
#define SYS_REGS_ADDR 1c010000
#define MMC_ADDR 1c050000
#define MMC_INT_0 107