tree 9c90ede299e03f43b53b667a89d0a5e51d750456
parent d43583c68c983dc1bcc2177af311bdd0ef554a1f
author Varun Wadekar <vwadekar@nvidia.com> 1457040490 -0800
committer Varun Wadekar <vwadekar@nvidia.com> 1487879530 -0800

Tegra: allow individual SoCs to restore their settings

This patch uses the Memory controller driver's handler to restore
its settings and moves the other chip specific code to their own
'pwr_domain_on_finish' handlers.

Change-Id: I3c9d23bdab9e2e3c05034ff6812cf941ccd7a75e
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>