feat(stm32mp1): allow configuration of DDR AXI ports number
A new flag STM32MP_DDR_DUAL_AXI_PORT is added, and enabled by default.
It will allow choosing single or dual AXI ports for DDR.
Change-Id: I48826a66a6f4d18df87e081c0960af89ddda1b9d
Signed-off-by: Yann Gautier <yann.gautier@st.com>
diff --git a/include/drivers/st/stm32mp1_ddr.h b/include/drivers/st/stm32mp1_ddr.h
index b434930..67dfac3 100644
--- a/include/drivers/st/stm32mp1_ddr.h
+++ b/include/drivers/st/stm32mp1_ddr.h
@@ -101,12 +101,14 @@
uint32_t pcfgqos1_0;
uint32_t pcfgwqos0_0;
uint32_t pcfgwqos1_0;
+#if STM32MP_DDR_DUAL_AXI_PORT
uint32_t pcfgr_1;
uint32_t pcfgw_1;
uint32_t pcfgqos0_1;
uint32_t pcfgqos1_1;
uint32_t pcfgwqos0_1;
uint32_t pcfgwqos1_1;
+#endif
};
struct stm32mp1_ddrphy_reg {
@@ -119,8 +121,10 @@
uint32_t zq0cr1;
uint32_t dx0gcr;
uint32_t dx1gcr;
+#if STM32MP_DDR_32BIT_INTERFACE
uint32_t dx2gcr;
uint32_t dx3gcr;
+#endif
};
struct stm32mp1_ddrphy_timing {