feat(imx8m): add 3600 MTps DDR PLL rate
Add 3600 MTps DRAM and its 900 MHz PLL setting M=300 P=8 S=0 , so
24 MHz * 300 / 8 / 2^0 = 900 MHz ~ 3600 MTps (x4) .
Signed-off-by: Marek Vasut <marex@denx.de>
Change-Id: If2743827294efc0f981718f04b772cc462846195
diff --git a/plat/imx/imx8m/ddr/clock.c b/plat/imx/imx8m/ddr/clock.c
index f23e410..21a1b68 100644
--- a/plat/imx/imx8m/ddr/clock.c
+++ b/plat/imx/imx8m/ddr/clock.c
@@ -96,6 +96,9 @@
case 3732:
mmio_write_32(DRAM_PLL_CTRL + 0x4, (311 << 12) | (4 << 4) | 1);
break;
+ case 3600:
+ mmio_write_32(DRAM_PLL_CTRL + 0x4, (300 << 12) | (8 << 4) | 0);
+ break;
case 3200:
mmio_write_32(DRAM_PLL_CTRL + 0x4, (300 << 12) | (9 << 4) | 0);
break;