/*
 * Copyright (c) 2019-2020, ARM Limited. All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

#include <export/common/tbbr/tbbr_img_def_exp.h>

/dts-v1/;

/ {
	dtb-registry {
		compatible = "arm,dyn_cfg-dtb_registry";

		/* tb_fw_config is temporarily contained on this dtb */
		tb_fw-config {
			load-address = <0x0 0x4001010>;
			max-size = <0x200>;
			id = <TB_FW_CONFIG_ID>;
		};

		hw-config {
			load-address = <0x0 0x82000000>;
			max-size = <0x01000000>;
			id = <HW_CONFIG_ID>;
		};

		/*
		 * Load SoC and TOS firmware configs at the base of
		 * non shared SRAM. The runtime checks ensure we don't
		 * overlap BL2, BL31 or BL32. The NT firmware config
		 * is loaded at base of DRAM.
		 */
		soc_fw-config {
			load-address = <0x0 0x04001000>;
			max-size = <0x200>;
			id = <SOC_FW_CONFIG_ID>;
		};

		tos_fw-config {
			load-address = <0x0 0x04001200>;
			max-size = <0x200>;
			id = <TOS_FW_CONFIG_ID>;
		};

		nt_fw-config {
			load-address = <0x0 0x80000000>;
			max-size = <0x200>;
			id = <NT_FW_CONFIG_ID>;
		};
	};

	tb_fw-config {
		compatible = "arm,tb_fw";

		/* Disable authentication for development */
		disable_auth = <0x0>;

		/*
		 * The following two entries are placeholders for Mbed TLS
		 * heap information. The default values don't matter since
		 * they will be overwritten by BL1.
		 * In case of having shared Mbed TLS heap between BL1 and BL2,
		 * BL1 will populate these two properties with the respective
		 * info about the shared heap. This info will be available for
		 * BL2 in order to locate and re-use the heap.
		 */
		mbedtls_heap_addr = <0x0 0x0>;
		mbedtls_heap_size = <0x0>;
	};
};