Merge "intel: Fix argument type for mailbox driver" into integration
diff --git a/Makefile b/Makefile
index 547b584..03f9fc6 100644
--- a/Makefile
+++ b/Makefile
@@ -621,6 +621,12 @@
endif
endif
+ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
+ ifeq (${ALLOW_RO_XLAT_TABLES}, 1)
+ $(error "ALLOW_RO_XLAT_TABLES requires translation tables library v2")
+ endif
+endif
+
################################################################################
# Process platform overrideable behaviour
################################################################################
@@ -701,6 +707,7 @@
# Variables for use with sptool
SPTOOLPATH ?= tools/sptool
SPTOOL ?= ${SPTOOLPATH}/sptool${BIN_EXT}
+SP_MK_GEN ?= ${SPTOOLPATH}/sp_mk_generator.py
# Variables for use with ROMLIB
ROMLIBPATH ?= lib/romlib
@@ -747,6 +754,7 @@
# Build options checks
################################################################################
+$(eval $(call assert_boolean,ALLOW_RO_XLAT_TABLES))
$(eval $(call assert_boolean,COLD_BOOT_SINGLE_CPU))
$(eval $(call assert_boolean,CREATE_KEYS))
$(eval $(call assert_boolean,CTX_INCLUDE_AARCH32_REGS))
@@ -771,6 +779,7 @@
$(eval $(call assert_boolean,GICV2_G0_FOR_EL3))
$(eval $(call assert_boolean,HANDLE_EA_EL3_FIRST))
$(eval $(call assert_boolean,HW_ASSISTED_COHERENCY))
+$(eval $(call assert_boolean,INVERTED_MEMMAP))
$(eval $(call assert_boolean,MEASURED_BOOT))
$(eval $(call assert_boolean,NS_TIMER_SWITCH))
$(eval $(call assert_boolean,OVERRIDE_LIBC))
@@ -814,6 +823,7 @@
# platform to overwrite the default options
################################################################################
+$(eval $(call add_define,ALLOW_RO_XLAT_TABLES))
$(eval $(call add_define,ARM_ARCH_MAJOR))
$(eval $(call add_define,ARM_ARCH_MINOR))
$(eval $(call add_define,COLD_BOOT_SINGLE_CPU))
@@ -889,11 +899,22 @@
$(eval $(call add_define,USE_ARM_LINK))
endif
+# Generate and include sp_gen.mk if SPD is spmd and SP_LAYOUT_FILE is defined
+ifdef SP_LAYOUT_FILE
+ifeq (${SPD},spmd)
+ -include $(BUILD_PLAT)/sp_gen.mk
+ FIP_DEPS += sp
+ NEED_SP_PKG := yes
+else
+ $(error "SP_LAYOUT_FILE will be used only if SPD=spmd")
+endif
+endif
+
################################################################################
# Build targets
################################################################################
-.PHONY: all msg_start clean realclean distclean cscope locate-checkpatch checkcodebase checkpatch fiptool sptool fip fwu_fip certtool dtbs memmap doc
+.PHONY: all msg_start clean realclean distclean cscope locate-checkpatch checkcodebase checkpatch fiptool sptool fip sp fwu_fip certtool dtbs memmap doc
.SUFFIXES:
all: msg_start
@@ -971,6 +992,17 @@
$(eval $(call MAKE_DTBS,$(BUILD_PLAT)/fdts,$(FDT_SOURCES)))
endif
+# Add Secure Partition packages
+ifeq (${NEED_SP_PKG},yes)
+$(BUILD_PLAT)/sp_gen.mk: ${SP_MK_GEN} ${SP_LAYOUT_FILE} | ${BUILD_PLAT}
+ ${Q}${PYTHON} "$<" "$@" $(filter-out $<,$^) $(BUILD_PLAT)
+sp: $(SPTOOL) $(DTBS) $(BUILD_PLAT)/sp_gen.mk
+ ${Q}$(SPTOOL) $(SPTOOL_ARGS)
+ @${ECHO_BLANK_LINE}
+ @echo "Built SP Images successfully"
+ @${ECHO_BLANK_LINE}
+endif
+
locate-checkpatch:
ifndef CHECKPATCH
$(error "Please set CHECKPATCH to point to the Linux checkpatch.pl file, eg: CHECKPATCH=../linux/scripts/checkpatch.pl")
@@ -1089,7 +1121,7 @@
# Call print_memory_map tool
memmap: all
- ${Q}${PYTHON} $(PRINT_MEMORY_MAP) $(BUILD_PLAT)
+ ${Q}${PYTHON} ${PRINT_MEMORY_MAP} ${BUILD_PLAT} ${INVERTED_MEMMAP}
doc:
@echo " BUILD DOCUMENTATION"
@@ -1132,6 +1164,7 @@
@echo " distclean Remove all build artifacts for all platforms"
@echo " certtool Build the Certificate generation tool"
@echo " fiptool Build the Firmware Image Package (FIP) creation tool"
+ @echo " sp Build the Secure Partition Packages"
@echo " sptool Build the Secure Partition Package creation tool"
@echo " dtbs Build the Device Tree Blobs (if required for the platform)"
@echo " memmap Print the memory map of the built binaries"
diff --git a/docs/change-log-upcoming.rst b/docs/change-log-upcoming.rst
index 14280cb..c4e8bb0 100644
--- a/docs/change-log-upcoming.rst
+++ b/docs/change-log-upcoming.rst
@@ -33,6 +33,7 @@
- Libraries
- Example: "Introduce BTI support in Library at ROM (romlib)"
+ - Add Firmware Configuration Framework (fconf).
- New Platforms Support
- Example: "qemu/qemu_sbsa: New platform support added for QEMU SBSA platform"
diff --git a/docs/getting_started/build-options.rst b/docs/getting_started/build-options.rst
index 8854a79..da5dcbf 100644
--- a/docs/getting_started/build-options.rst
+++ b/docs/getting_started/build-options.rst
@@ -340,6 +340,11 @@
translation library (xlat tables v2) must be used; version 1 of translation
library is not supported.
+- ``INVERTED_MEMMAP``: memmap tool print by default lower addresses at the
+ bottom, higher addresses at the top. This buid flag can be set to '1' to
+ invert this behavior. Lower addresses will be printed at the top and higher
+ addresses at the bottom.
+
- ``JUNO_AARCH32_EL3_RUNTIME``: This build flag enables you to execute EL3
runtime software in AArch32 mode, which is required to run AArch32 on Juno.
By default this flag is set to '0'. Enabling this flag builds BL1 and BL2 in
@@ -522,6 +527,11 @@
- ``SPM_MM`` : Boolean option to enable the Management Mode (MM)-based Secure
Partition Manager (SPM) implementation. The default value is ``0``.
+- ``SP_LAYOUT_FILE``: Platform provided path to JSON file containing the
+ description of secure partitions. Build system will parse this file and
+ package all secure partition blobs in FIP. This file not necessarily be
+ part of TF-A tree. Only avaialbe when ``SPD=spmd``.
+
- ``SP_MIN_WITH_SECURE_FIQ``: Boolean flag to indicate the SP_MIN handles
secure interrupts (caught through the FIQ line). Platforms can enable
this directive if they need to handle such interruption. When enabled,
diff --git a/docs/plat/arm/fvp/index.rst b/docs/plat/arm/fvp/index.rst
index 40e9661..169b6f3 100644
--- a/docs/plat/arm/fvp/index.rst
+++ b/docs/plat/arm/fvp/index.rst
@@ -26,6 +26,8 @@
- ``FVP_Base_Cortex-A57x2-A53x4``
- ``FVP_Base_Cortex-A57x4-A53x4``
- ``FVP_Base_Cortex-A57x4``
+- ``FVP_Base_Cortex-A65x4`` (Version 11.9 build 41)
+- ``FVP_Base_Cortex-A65AEx8`` (Version 11.9 build 41)
- ``FVP_Base_Cortex-A72x4-A53x4``
- ``FVP_Base_Cortex-A72x4``
- ``FVP_Base_Cortex-A73x4-A53x4``
@@ -628,7 +630,7 @@
--------------
-*Copyright (c) 2019, Arm Limited. All rights reserved.*
+*Copyright (c) 2019-2020, Arm Limited. All rights reserved.*
.. _TB_FW_CONFIG for FVP: ../plat/arm/board/fvp/fdts/fvp_tb_fw_config.dts
.. _Arm's website: `FVP models`_
diff --git a/docs/plat/index.rst b/docs/plat/index.rst
index 63d29a9..a6ef188 100644
--- a/docs/plat/index.rst
+++ b/docs/plat/index.rst
@@ -9,6 +9,7 @@
allwinner
arm/index
+ meson-axg
meson-gxbb
meson-gxl
meson-g12a
@@ -53,4 +54,4 @@
--------------
-*Copyright (c) 2019, Arm Limited. All rights reserved.*
+*Copyright (c) 2019-2020, Arm Limited. All rights reserved.*
diff --git a/drivers/allwinner/sunxi_msgbox.c b/drivers/allwinner/sunxi_msgbox.c
new file mode 100644
index 0000000..cc4a6ff
--- /dev/null
+++ b/drivers/allwinner/sunxi_msgbox.c
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <assert.h>
+#include <stdbool.h>
+
+#include <drivers/delay_timer.h>
+#include <lib/bakery_lock.h>
+#include <lib/mmio.h>
+#include <lib/utils_def.h>
+
+#include <sunxi_mmap.h>
+
+#define REMOTE_IRQ_EN_REG 0x0040
+#define REMOTE_IRQ_STAT_REG 0x0050
+#define LOCAL_IRQ_EN_REG 0x0060
+#define LOCAL_IRQ_STAT_REG 0x0070
+
+#define RX_IRQ(n) BIT(0 + 2 * (n))
+#define TX_IRQ(n) BIT(1 + 2 * (n))
+
+#define FIFO_STAT_REG(n) (0x0100 + 0x4 * (n))
+#define FIFO_STAT_MASK GENMASK(0, 0)
+
+#define MSG_STAT_REG(n) (0x0140 + 0x4 * (n))
+#define MSG_STAT_MASK GENMASK(2, 0)
+
+#define MSG_DATA_REG(n) (0x0180 + 0x4 * (n))
+
+#define RX_CHAN 1
+#define TX_CHAN 0
+
+#define MHU_MAX_SLOT_ID 31
+
+#define MHU_TIMEOUT_DELAY 10
+#define MHU_TIMEOUT_ITERS 10000
+
+static DEFINE_BAKERY_LOCK(mhu_secure_message_lock);
+
+static bool sunxi_msgbox_last_tx_done(unsigned int chan)
+{
+ uint32_t stat = mmio_read_32(SUNXI_MSGBOX_BASE + REMOTE_IRQ_STAT_REG);
+
+ return (stat & RX_IRQ(chan)) == 0U;
+}
+
+static bool sunxi_msgbox_peek_data(unsigned int chan)
+{
+ uint32_t stat = mmio_read_32(SUNXI_MSGBOX_BASE + MSG_STAT_REG(chan));
+
+ return (stat & MSG_STAT_MASK) != 0U;
+}
+
+void mhu_secure_message_start(unsigned int slot_id __unused)
+{
+ uint32_t timeout = MHU_TIMEOUT_ITERS;
+
+ bakery_lock_get(&mhu_secure_message_lock);
+
+ /* Wait for all previous messages to be acknowledged. */
+ while (!sunxi_msgbox_last_tx_done(TX_CHAN) && --timeout)
+ udelay(MHU_TIMEOUT_DELAY);
+}
+
+void mhu_secure_message_send(unsigned int slot_id)
+{
+ mmio_write_32(SUNXI_MSGBOX_BASE + MSG_DATA_REG(TX_CHAN), BIT(slot_id));
+}
+
+uint32_t mhu_secure_message_wait(void)
+{
+ uint32_t timeout = MHU_TIMEOUT_ITERS;
+ uint32_t msg = 0;
+
+ /* Wait for a message from the SCP. */
+ while (!sunxi_msgbox_peek_data(RX_CHAN) && --timeout)
+ udelay(MHU_TIMEOUT_DELAY);
+
+ /* Return the most recent message in the FIFO. */
+ while (sunxi_msgbox_peek_data(RX_CHAN))
+ msg = mmio_read_32(SUNXI_MSGBOX_BASE + MSG_DATA_REG(RX_CHAN));
+
+ return msg;
+}
+
+void mhu_secure_message_end(unsigned int slot_id)
+{
+ /* Acknowledge a response by clearing the IRQ status. */
+ mmio_write_32(SUNXI_MSGBOX_BASE + LOCAL_IRQ_STAT_REG, RX_IRQ(RX_CHAN));
+
+ bakery_lock_release(&mhu_secure_message_lock);
+}
diff --git a/drivers/amlogic/console/aarch64/meson_console.S b/drivers/amlogic/console/aarch64/meson_console.S
index e645cba..39c2545 100644
--- a/drivers/amlogic/console/aarch64/meson_console.S
+++ b/drivers/amlogic/console/aarch64/meson_console.S
@@ -46,14 +46,14 @@
/* -----------------------------------------------
* int console_meson_register(uintptr_t base,
* uint32_t clk, uint32_t baud,
- * console_meson_t *console);
+ * console_t *console);
* Function to initialize and register a new MESON
* console. Storage passed in for the console struct
* *must* be persistent (i.e. not from the stack).
* In: x0 - UART register base address
* w1 - UART clock in Hz
* w2 - Baud rate
- * x3 - pointer to empty console_meson_t struct
+ * x3 - pointer to empty console_t struct
* Out: return 1 on success, 0 on error
* Clobber list : x0, x1, x2, x6, x7, x14
* -----------------------------------------------
@@ -62,7 +62,7 @@
mov x7, x30
mov x6, x3
cbz x6, register_fail
- str x0, [x6, #CONSOLE_T_MESON_BASE]
+ str x0, [x6, #CONSOLE_T_BASE]
bl console_meson_init
cbz x0, register_fail
@@ -128,7 +128,7 @@
endfunc console_meson_init
/* --------------------------------------------------------
- * int console_meson_putc(int c, console_meson_t *console)
+ * int console_meson_putc(int c, console_t *console)
* Function to output a character over the console. It
* returns the character printed on success or -1 on error.
* In : w0 - character to be printed
@@ -142,7 +142,7 @@
cmp x1, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr x1, [x1, #CONSOLE_T_MESON_BASE]
+ ldr x1, [x1, #CONSOLE_T_BASE]
b console_meson_core_putc
endfunc console_meson_putc
@@ -179,7 +179,7 @@
endfunc console_meson_core_putc
/* ---------------------------------------------
- * int console_meson_getc(console_meson_t *console)
+ * int console_meson_getc(console_t *console)
* Function to get a character from the console.
* It returns the character grabbed on success
* or -1 if no character is available.
@@ -193,7 +193,7 @@
cmp x0, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr x0, [x0, #CONSOLE_T_MESON_BASE]
+ ldr x0, [x0, #CONSOLE_T_BASE]
b console_meson_core_getc
endfunc console_meson_getc
@@ -224,7 +224,7 @@
endfunc console_meson_core_getc
/* ---------------------------------------------
- * int console_meson_flush(console_meson_t *console)
+ * int console_meson_flush(console_t *console)
* Function to force a write of all buffered
* data that hasn't been output.
* In : x0 - pointer to console_t structure
@@ -237,7 +237,7 @@
cmp x0, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr x0, [x0, #CONSOLE_T_MESON_BASE]
+ ldr x0, [x0, #CONSOLE_T_BASE]
b console_meson_core_flush
endfunc console_meson_flush
diff --git a/drivers/arm/css/scpi/css_scpi.c b/drivers/arm/css/scpi/css_scpi.c
index c56b7c4..416356b 100644
--- a/drivers/arm/css/scpi/css_scpi.c
+++ b/drivers/arm/css/scpi/css_scpi.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -51,7 +51,7 @@
mhu_secure_message_send(SCPI_MHU_SLOT_ID);
}
-static void scpi_secure_message_receive(scpi_cmd_t *cmd)
+static int scpi_secure_message_receive(scpi_cmd_t *cmd)
{
uint32_t mhu_status;
@@ -63,7 +63,7 @@
if (mhu_status != (1 << SCPI_MHU_SLOT_ID)) {
ERROR("MHU: Unexpected protocol (MHU status: 0x%x)\n",
mhu_status);
- panic();
+ return -1;
}
/*
@@ -74,6 +74,8 @@
dmbld();
memcpy(cmd, (void *) SCPI_SHARED_MEM_SCP_TO_AP, sizeof(*cmd));
+
+ return 0;
}
static void scpi_secure_message_end(void)
@@ -84,14 +86,19 @@
int scpi_wait_ready(void)
{
scpi_cmd_t scpi_cmd;
+ int rc;
VERBOSE("Waiting for SCP_READY command...\n");
/* Get a message from the SCP */
scpi_secure_message_start();
- scpi_secure_message_receive(&scpi_cmd);
+ rc = scpi_secure_message_receive(&scpi_cmd);
scpi_secure_message_end();
+ /* If no message was received, don't send a response */
+ if (rc != 0)
+ return rc;
+
/* We are expecting 'SCP Ready', produce correct error if it's not */
scpi_status_t status = SCP_OK;
if (scpi_cmd.id != SCPI_CMD_SCP_READY) {
@@ -209,7 +216,8 @@
* Send message and wait for SCP's response
*/
scpi_secure_message_send(0);
- scpi_secure_message_receive(&response);
+ if (scpi_secure_message_receive(&response) != 0)
+ goto exit;
if (response.status != SCP_OK)
goto exit;
@@ -254,7 +262,9 @@
*payload_addr = system_state & 0xff;
scpi_secure_message_send(sizeof(*payload_addr));
- scpi_secure_message_receive(&response);
+ /* If no response is received, fill in an error status */
+ if (scpi_secure_message_receive(&response) != 0)
+ response.status = SCP_E_TIMEOUT;
scpi_secure_message_end();
diff --git a/drivers/arm/pl011/aarch32/pl011_console.S b/drivers/arm/pl011/aarch32/pl011_console.S
index 05c8250..93045f0 100644
--- a/drivers/arm/pl011/aarch32/pl011_console.S
+++ b/drivers/arm/pl011/aarch32/pl011_console.S
@@ -91,14 +91,14 @@
/* -------------------------------------------------------
* int console_pl011_register(uintptr_t baseaddr,
* uint32_t clock, uint32_t baud,
- * console_pl011_t *console);
+ * console_t *console);
* Function to initialize and register a new PL011
* console. Storage passed in for the console struct
* *must* be persistent (i.e. not from the stack).
* In: r0 - UART register base address
* r1 - UART clock in Hz
* r2 - Baud rate
- * r3 - pointer to empty console_pl011_t struct
+ * r3 - pointer to empty console_t struct
* Out: return 1 on success, 0 on error
* Clobber list : r0, r1, r2
* -------------------------------------------------------
@@ -108,7 +108,7 @@
mov r4, r3
cmp r4, #0
beq register_fail
- str r0, [r4, #CONSOLE_T_PL011_BASE]
+ str r0, [r4, #CONSOLE_T_BASE]
bl console_pl011_core_init
cmp r0, #0
@@ -159,7 +159,7 @@
endfunc console_pl011_core_putc
/* --------------------------------------------------------
- * int console_pl011_putc(int c, console_pl011_t *console)
+ * int console_pl011_putc(int c, console_t *console)
* Function to output a character over the console. It
* returns the character printed on success or -1 on error.
* In: r0 - character to be printed
@@ -173,7 +173,7 @@
cmp r1, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr r1, [r1, #CONSOLE_T_PL011_BASE]
+ ldr r1, [r1, #CONSOLE_T_BASE]
b console_pl011_core_putc
endfunc console_pl011_putc
@@ -203,7 +203,7 @@
endfunc console_pl011_core_getc
/* ------------------------------------------------
- * int console_pl011_getc(console_pl011_t *console)
+ * int console_pl011_getc(console_t *console)
* Function to get a character from the console.
* It returns the character grabbed on success
* or -1 if no character is available.
@@ -217,7 +217,7 @@
cmp r0, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr r0, [r0, #CONSOLE_T_PL011_BASE]
+ ldr r0, [r0, #CONSOLE_T_BASE]
b console_pl011_core_getc
endfunc console_pl011_getc
@@ -248,7 +248,7 @@
endfunc console_pl011_core_flush
/* ---------------------------------------------
- * int console_pl011_flush(console_pl011_t *console)
+ * int console_pl011_flush(console_t *console)
* Function to force a write of all buffered
* data that hasn't been output.
* In : r0 - pointer to console_t structure
@@ -261,6 +261,6 @@
cmp r0, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr r0, [r0, #CONSOLE_T_PL011_BASE]
+ ldr r0, [r0, #CONSOLE_T_BASE]
b console_pl011_core_flush
endfunc console_pl011_flush
diff --git a/drivers/arm/pl011/aarch64/pl011_console.S b/drivers/arm/pl011/aarch64/pl011_console.S
index 04de99f..3a2a3cd 100644
--- a/drivers/arm/pl011/aarch64/pl011_console.S
+++ b/drivers/arm/pl011/aarch64/pl011_console.S
@@ -80,14 +80,14 @@
/* -----------------------------------------------
* int console_pl011_register(uintptr_t baseaddr,
* uint32_t clock, uint32_t baud,
- * console_pl011_t *console);
+ * console_t *console);
* Function to initialize and register a new PL011
* console. Storage passed in for the console struct
* *must* be persistent (i.e. not from the stack).
* In: x0 - UART register base address
* w1 - UART clock in Hz
* w2 - Baud rate
- * x3 - pointer to empty console_pl011_t struct
+ * x3 - pointer to empty console_t struct
* Out: return 1 on success, 0 on error
* Clobber list : x0, x1, x2, x6, x7, x14
* -----------------------------------------------
@@ -96,7 +96,7 @@
mov x7, x30
mov x6, x3
cbz x6, register_fail
- str x0, [x6, #CONSOLE_T_PL011_BASE]
+ str x0, [x6, #CONSOLE_T_BASE]
bl console_pl011_core_init
cbz x0, register_fail
@@ -143,7 +143,7 @@
endfunc console_pl011_core_putc
/* --------------------------------------------------------
- * int console_pl011_putc(int c, console_pl011_t *console)
+ * int console_pl011_putc(int c, console_t *console)
* Function to output a character over the console. It
* returns the character printed on success or -1 on error.
* In : w0 - character to be printed
@@ -157,7 +157,7 @@
cmp x1, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr x1, [x1, #CONSOLE_T_PL011_BASE]
+ ldr x1, [x1, #CONSOLE_T_BASE]
b console_pl011_core_putc
endfunc console_pl011_putc
@@ -189,7 +189,7 @@
endfunc console_pl011_core_getc
/* ---------------------------------------------
- * int console_pl011_getc(console_pl011_t *console)
+ * int console_pl011_getc(console_t *console)
* Function to get a character from the console.
* It returns the character grabbed on success
* or -1 if no character is available.
@@ -203,7 +203,7 @@
cmp x0, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr x0, [x0, #CONSOLE_T_PL011_BASE]
+ ldr x0, [x0, #CONSOLE_T_BASE]
b console_pl011_core_getc
endfunc console_pl011_getc
@@ -231,7 +231,7 @@
endfunc console_pl011_core_flush
/* ---------------------------------------------
- * int console_pl011_flush(console_pl011_t *console)
+ * int console_pl011_flush(console_t *console)
* Function to force a write of all buffered
* data that hasn't been output.
* In : x0 - pointer to console_t structure
@@ -244,6 +244,6 @@
cmp x0, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr x0, [x0, #CONSOLE_T_PL011_BASE]
+ ldr x0, [x0, #CONSOLE_T_BASE]
b console_pl011_core_flush
endfunc console_pl011_flush
diff --git a/drivers/cadence/uart/aarch64/cdns_console.S b/drivers/cadence/uart/aarch64/cdns_console.S
index ecd0c47..8e5d6a1 100644
--- a/drivers/cadence/uart/aarch64/cdns_console.S
+++ b/drivers/cadence/uart/aarch64/cdns_console.S
@@ -56,14 +56,14 @@
/* -----------------------------------------------
* int console_cdns_register(uintptr_t baseaddr,
* uint32_t clock, uint32_t baud,
- * console_cdns_t *console);
+ * console_t *console);
* Function to initialize and register a new CDNS
* console. Storage passed in for the console struct
* *must* be persistent (i.e. not from the stack).
* In: x0 - UART register base address
* w1 - UART clock in Hz
* w2 - Baud rate
- * x3 - pointer to empty console_16550_t struct
+ * x3 - pointer to empty console_t struct
* Out: return 1 on success, 0 on error
* Clobber list : x0, x1, x2, x6, x7, x14
* -----------------------------------------------
@@ -72,7 +72,7 @@
mov x7, x30
mov x6, x3
cbz x6, register_fail
- str x0, [x6, #CONSOLE_T_CDNS_BASE]
+ str x0, [x6, #CONSOLE_T_BASE]
bl console_cdns_core_init
cbz x0, register_fail
@@ -119,7 +119,7 @@
endfunc console_cdns_core_putc
/* --------------------------------------------------------
- * int console_cdns_putc(int c, console_cdns_t *cdns)
+ * int console_cdns_putc(int c, console_t *cdns)
* Function to output a character over the console. It
* returns the character printed on success or -1 on error.
* In : w0 - character to be printed
@@ -133,7 +133,7 @@
cmp x1, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr x1, [x1, #CONSOLE_T_CDNS_BASE]
+ ldr x1, [x1, #CONSOLE_T_BASE]
b console_cdns_core_putc
endfunc console_cdns_putc
@@ -165,7 +165,7 @@
endfunc console_cdns_core_getc
/* ---------------------------------------------
- * int console_cdns_getc(console_cdns_t *console)
+ * int console_cdns_getc(console_t *console)
* Function to get a character from the console.
* It returns the character grabbed on success
* or -1 if no character is available.
@@ -179,7 +179,7 @@
cmp x0, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr x0, [x0, #CONSOLE_T_CDNS_BASE]
+ ldr x0, [x0, #CONSOLE_T_BASE]
b console_cdns_core_getc
endfunc console_cdns_getc
@@ -203,7 +203,7 @@
endfunc console_cdns_core_flush
/* ---------------------------------------------
- * int console_cdns_flush(console_pl011_t *console)
+ * int console_cdns_flush(console_t *console)
* Function to force a write of all buffered
* data that hasn't been output.
* In : x0 - pointer to console_t structure
@@ -216,6 +216,6 @@
cmp x0, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr x0, [x0, #CONSOLE_T_CDNS_BASE]
+ ldr x0, [x0, #CONSOLE_T_BASE]
b console_cdns_core_flush
endfunc console_cdns_flush
diff --git a/drivers/console/aarch32/skeleton_console.S b/drivers/console/aarch32/skeleton_console.S
index 45ad139..c594f7e 100644
--- a/drivers/console/aarch32/skeleton_console.S
+++ b/drivers/console/aarch32/skeleton_console.S
@@ -50,7 +50,7 @@
* by later console callback (e.g. putc).
* Example:
*/
- str r1, [r0, #CONSOLE_T_XXX_BASE]
+ str r1, [r0, #CONSOLE_T_BASE]
str r2, [r0, #CONSOLE_T_XXX_SOME_OTHER_VALUE]
/*
@@ -87,7 +87,7 @@
* console_xxx_t structure pointed to by r1.
* Example:
*/
- ldr r1, [r1, #CONSOLE_T_XXX_BASE]
+ ldr r1, [r1, #CONSOLE_T_BASE]
/*
* Write r0 to hardware.
@@ -125,7 +125,7 @@
* console_xxx_t structure pointed to by r0.
* Example:
*/
- ldr r1, [r0, #CONSOLE_T_XXX_BASE]
+ ldr r1, [r0, #CONSOLE_T_BASE]
/*
* Try to read character into r0 from hardware.
@@ -159,7 +159,7 @@
* console_xxx_t structure pointed to by r0.
* Example:
*/
- ldr r1, [r0, #CONSOLE_T_XXX_BASE]
+ ldr r1, [r0, #CONSOLE_T_BASE]
/*
* Flush all remaining output from hardware FIFOs. Do not return until
diff --git a/drivers/console/aarch64/skeleton_console.S b/drivers/console/aarch64/skeleton_console.S
index 957ed83..9a85867 100644
--- a/drivers/console/aarch64/skeleton_console.S
+++ b/drivers/console/aarch64/skeleton_console.S
@@ -50,7 +50,7 @@
* by later console callback (e.g. putc).
* Example:
*/
- str x1, [x0, #CONSOLE_T_XXX_BASE]
+ str x1, [x0, #CONSOLE_T_BASE]
str x2, [x0, #CONSOLE_T_XXX_SOME_OTHER_VALUE]
/*
@@ -87,7 +87,7 @@
* console_xxx_t structure pointed to by x1.
* Example:
*/
- ldr x1, [x1, #CONSOLE_T_XXX_BASE]
+ ldr x1, [x1, #CONSOLE_T_BASE]
/*
* Write w0 to hardware.
@@ -125,7 +125,7 @@
* console_xxx_t structure pointed to by x0.
* Example:
*/
- ldr x1, [x0, #CONSOLE_T_XXX_BASE]
+ ldr x1, [x0, #CONSOLE_T_BASE]
/*
* Try to read character into w0 from hardware.
@@ -159,7 +159,7 @@
* console_xxx_t structure pointed to by x0.
* Example:
*/
- ldr x1, [x0, #CONSOLE_T_XXX_BASE]
+ ldr x1, [x0, #CONSOLE_T_BASE]
/*
* Flush all remaining output from hardware FIFOs. Do not return until
diff --git a/drivers/coreboot/cbmem_console/aarch64/cbmem_console.S b/drivers/coreboot/cbmem_console/aarch64/cbmem_console.S
index fd04c2e..a4a7bf8 100644
--- a/drivers/coreboot/cbmem_console/aarch64/cbmem_console.S
+++ b/drivers/coreboot/cbmem_console/aarch64/cbmem_console.S
@@ -35,7 +35,7 @@
* -----------------------------------------------
*/
func console_cbmc_register
- str x0, [x1, #CONSOLE_T_CBMC_BASE]
+ str x0, [x1, #CONSOLE_T_BASE]
ldr w2, [x0]
str w2, [x1, #CONSOLE_T_CBMC_SIZE]
mov x0, x1
@@ -54,7 +54,7 @@
*/
func console_cbmc_putc
ldr w2, [x1, #CONSOLE_T_CBMC_SIZE]
- ldr x1, [x1, #CONSOLE_T_CBMC_BASE]
+ ldr x1, [x1, #CONSOLE_T_BASE]
add x1, x1, #8 /* keep address of body in x1 */
ldr w16, [x1, #-4] /* load cursor (one u32 before body) */
@@ -93,7 +93,7 @@
func console_cbmc_flush
mov x5, x30
ldr x1, [x0, #CONSOLE_T_CBMC_SIZE]
- ldr x0, [x0, #CONSOLE_T_CBMC_BASE]
+ ldr x0, [x0, #CONSOLE_T_BASE]
add x1, x1, #8 /* add size of console header */
bl clean_dcache_range /* (clobbers x2 and x3) */
mov x0, #0
diff --git a/drivers/imx/uart/imx_uart.h b/drivers/imx/uart/imx_uart.h
index 4f6d3de..a133024 100644
--- a/drivers/imx/uart/imx_uart.h
+++ b/drivers/imx/uart/imx_uart.h
@@ -154,15 +154,10 @@
#ifndef __ASSEMBLER__
-typedef struct {
- console_t console;
- uintptr_t base;
-} console_imx_uart_t;
-
int console_imx_uart_register(uintptr_t baseaddr,
uint32_t clock,
uint32_t baud,
- console_imx_uart_t *console);
+ console_t *console);
#endif /*__ASSEMBLER__*/
#endif /* IMX_UART_H */
diff --git a/drivers/marvell/uart/a3700_console.S b/drivers/marvell/uart/a3700_console.S
index da1ce35..ecd494c 100644
--- a/drivers/marvell/uart/a3700_console.S
+++ b/drivers/marvell/uart/a3700_console.S
@@ -110,7 +110,7 @@
.globl console_a3700_register
/* -----------------------------------------------
- * int console_a3700_register(console_16550_t *console,
+ * int console_a3700_register(console_t *console,
uintptr_t base, uint32_t clk, uint32_t baud)
* Function to initialize and register a new a3700
* console. Storage passed in for the console struct
@@ -118,7 +118,7 @@
* In: x0 - UART register base address
* w1 - UART clock in Hz
* w2 - Baud rate
- * x3 - pointer to empty console_a3700_t struct
+ * x3 - pointer to empty console_t struct
* Out: return 1 on success, 0 on error
* Clobber list : x0, x1, x2, x6, x7, x14
* -----------------------------------------------
@@ -127,7 +127,7 @@
mov x7, x30
mov x6, x3
cbz x6, register_fail
- str x0, [x6, #CONSOLE_T_A3700_BASE]
+ str x0, [x6, #CONSOLE_T_BASE]
bl console_a3700_core_init
cbz x0, register_fail
@@ -178,7 +178,7 @@
endfunc console_a3700_core_putc
/* --------------------------------------------------------
- * int console_a3700_putc(int c, console_a3700_t *console)
+ * int console_a3700_putc(int c, console_t *console)
* Function to output a character over the console. It
* returns the character printed on success or -1 on error.
* In : w0 - character to be printed
@@ -188,7 +188,7 @@
* --------------------------------------------------------
*/
func console_a3700_putc
- ldr x1, [x1, #CONSOLE_T_A3700_BASE]
+ ldr x1, [x1, #CONSOLE_T_BASE]
b console_a3700_core_putc
endfunc console_a3700_putc
@@ -208,7 +208,7 @@
endfunc console_a3700_core_getc
/* ---------------------------------------------
- * int console_a3700_getc(console_a3700_t *console)
+ * int console_a3700_getc(console_t *console)
* Function to get a character from the console.
* It returns the character grabbed on success
* or -1 on if no character is available.
@@ -218,7 +218,7 @@
* ---------------------------------------------
*/
func console_a3700_getc
- ldr x0, [x0, #CONSOLE_T_A3700_BASE]
+ ldr x0, [x0, #CONSOLE_T_BASE]
b console_a3700_core_getc
endfunc console_a3700_getc
@@ -237,7 +237,7 @@
endfunc console_a3700_core_flush
/* ---------------------------------------------
- * int console_a3700_flush(console_a3700_t *console)
+ * int console_a3700_flush(console_t *console)
* Function to force a write of all buffered
* data that hasn't been output.
* In : x0 - pointer to console_t structure
@@ -246,7 +246,7 @@
* ---------------------------------------------
*/
func console_a3700_flush
- ldr x0, [x0, #CONSOLE_T_A3700_BASE]
+ ldr x0, [x0, #CONSOLE_T_BASE]
b console_a3700_core_flush
endfunc console_a3700_flush
diff --git a/drivers/renesas/rcar/console/rcar_console.S b/drivers/renesas/rcar/console/rcar_console.S
index 859efec..4d006b7 100644
--- a/drivers/renesas/rcar/console/rcar_console.S
+++ b/drivers/renesas/rcar/console/rcar_console.S
@@ -20,14 +20,14 @@
/* -----------------------------------------------
* int console_rcar_register(
* uintptr_t base, uint32_t clk, uint32_t baud,
- * console_rcar_t *console)
+ * console_t *console)
* Function to initialize and register a new rcar
* console. Storage passed in for the console struct
* *must* be persistent (i.e. not from the stack).
* In: x0 - UART register base address
* w1 - UART clock in Hz
* w2 - Baud rate
- * x3 - pointer to empty console_rcar_t struct
+ * x3 - pointer to empty console_t struct
* Out: return 1 on success, 0 on error
* Clobber list : x0, x1, x2, x6, x7, x14
* -----------------------------------------------
@@ -36,7 +36,7 @@
mov x7, x30
mov x6, x3
cbz x6, register_fail
- str x0, [x6, #CONSOLE_T_RCAR_BASE]
+ str x0, [x6, #CONSOLE_T_BASE]
bl rcar_log_init
cbz x0, register_fail
@@ -68,11 +68,11 @@
endfunc console_rcar_init
/* --------------------------------------------------------
- * int console_rcar_putc(int c, console_rcar_t *console)
+ * int console_rcar_putc(int c, console_t *console)
* Function to output a character over the console. It
* returns the character printed on success or -1 on error.
* In : w0 - character to be printed
- * x1 - pointer to console_rcar_t structure
+ * x1 - pointer to console_t structure
* Out : return -1 on error else return character.
* Clobber list : x2
* --------------------------------------------------------
diff --git a/drivers/renesas/rcar/scif/scif.S b/drivers/renesas/rcar/scif/scif.S
index 8309bb2..064aba4 100644
--- a/drivers/renesas/rcar/scif/scif.S
+++ b/drivers/renesas/rcar/scif/scif.S
@@ -126,14 +126,14 @@
/* -----------------------------------------------
* int console_rcar_register(
* uintptr_t base, uint32_t clk, uint32_t baud,
- * console_rcar_t *console)
+ * console_t *console)
* Function to initialize and register a new rcar
* console. Storage passed in for the console struct
* *must* be persistent (i.e. not from the stack).
* In: x0 - UART register base address
* w1 - UART clock in Hz
* w2 - Baud rate
- * x3 - pointer to empty console_rcar_t struct
+ * x3 - pointer to empty console_t struct
* Out: return 1 on success, 0 on error
* Clobber list : x0, x1, x2, x6, x7, x14
* -----------------------------------------------
@@ -142,7 +142,7 @@
mov x7, x30
mov x6, x3
cbz x6, register_fail
- str x0, [x6, #CONSOLE_T_RCAR_BASE]
+ str x0, [x6, #CONSOLE_T_BASE]
bl console_rcar_init
diff --git a/drivers/st/uart/aarch32/stm32_console.S b/drivers/st/uart/aarch32/stm32_console.S
index ca3c1f6..0ed37d1 100644
--- a/drivers/st/uart/aarch32/stm32_console.S
+++ b/drivers/st/uart/aarch32/stm32_console.S
@@ -91,14 +91,14 @@
/* -------------------------------------------------------
* int console_stm32_register(uintptr_t baseaddr,
* uint32_t clock, uint32_t baud,
- * struct console_stm32 *console);
+ * console_t *console);
* Function to initialize and register a new STM32
* console. Storage passed in for the console struct
* *must* be persistent (i.e. not from the stack).
* In: r0 - UART register base address
* r1 - UART clock in Hz
* r2 - Baud rate
- * r3 - pointer to empty console_stm32 struct
+ * r3 - pointer to empty console_t struct
* Out: return 1 on success, 0 on error
* Clobber list : r0, r1, r2
* -------------------------------------------------------
@@ -108,7 +108,7 @@
mov r4, r3
cmp r4, #0
beq register_fail
- str r0, [r4, #CONSOLE_T_STM32_BASE]
+ str r0, [r4, #CONSOLE_T_BASE]
bl console_stm32_core_init
cmp r0, #0
@@ -157,7 +157,7 @@
endfunc console_stm32_core_putc
/* ------------------------------------------------------------
- * int console_stm32_putc(int c, struct console_stm32 *console)
+ * int console_stm32_putc(int c, console_t *console)
* Function to output a character over the console. It
* returns the character printed on success or -1 on error.
* In: r0 - character to be printed
@@ -171,7 +171,7 @@
cmp r1, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr r1, [r1, #CONSOLE_T_STM32_BASE]
+ ldr r1, [r1, #CONSOLE_T_BASE]
b console_stm32_core_putc
endfunc console_stm32_putc
@@ -219,7 +219,7 @@
endfunc console_stm32_core_flush
/* ------------------------------------------------------
- * int console_stm32_flush(struct console_stm32 *console)
+ * int console_stm32_flush(console_t *console)
* Function to force a write of all buffered
* data that hasn't been output.
* In : r0 - pointer to console_t structure
@@ -232,6 +232,6 @@
cmp r0, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr r0, [r0, #CONSOLE_T_STM32_BASE]
+ ldr r0, [r0, #CONSOLE_T_BASE]
b console_stm32_core_flush
endfunc console_stm32_flush
diff --git a/drivers/ti/uart/aarch32/16550_console.S b/drivers/ti/uart/aarch32/16550_console.S
index 5cd9b30..bc0b3ab 100644
--- a/drivers/ti/uart/aarch32/16550_console.S
+++ b/drivers/ti/uart/aarch32/16550_console.S
@@ -91,7 +91,7 @@
/* -------------------------------------------------------
* int console_16550_register(uintptr_t baseaddr,
* uint32_t clock, uint32_t baud,
- * console_16550_t *console);
+ * console_t *console);
* Function to initialize and register a new 16550
* console. Storage passed in for the console struct
* *must* be persistent (i.e. not from the stack).
@@ -101,7 +101,7 @@
* In: r0 - UART register base address
* r1 - UART clock in Hz
* r2 - Baud rate (ignored if r1 is 0)
- * r3 - pointer to empty console_16550_t struct
+ * r3 - pointer to empty console_t struct
* Out: return 1 on success, 0 on error
* Clobber list : r0, r1, r2
* -------------------------------------------------------
@@ -111,7 +111,7 @@
mov r4, r3
cmp r4, #0
beq register_fail
- str r0, [r4, #CONSOLE_T_16550_BASE]
+ str r0, [r4, #CONSOLE_T_BASE]
/* A clock rate of zero means to skip the initialisation. */
cmp r1, #0
@@ -167,7 +167,7 @@
endfunc console_16550_core_putc
/* --------------------------------------------------------
- * int console_16550_putc(int c, console_16550_t *console)
+ * int console_16550_putc(int c, console_t *console)
* Function to output a character over the console. It
* returns the character printed on success or -1 on error.
* In : r0 - character to be printed
@@ -181,7 +181,7 @@
cmp r1, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr r1, [r1, #CONSOLE_T_16550_BASE]
+ ldr r1, [r1, #CONSOLE_T_BASE]
b console_16550_core_putc
endfunc console_16550_putc
@@ -213,7 +213,7 @@
endfunc console_16550_core_getc
/* ---------------------------------------------
- * int console_16550_getc(console_16550_t *console)
+ * int console_16550_getc(console_t *console)
* Function to get a character from the console.
* It returns the character grabbed on success
* or -1 on if no character is available.
@@ -227,7 +227,7 @@
cmp r0, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr r0, [r0, #CONSOLE_T_16550_BASE]
+ ldr r0, [r0, #CONSOLE_T_BASE]
b console_16550_core_getc
endfunc console_16550_getc
@@ -257,7 +257,7 @@
endfunc console_16550_core_flush
/* ---------------------------------------------
- * int console_16550_flush(console_pl011_t *console)
+ * int console_16550_flush(console_t *console)
* Function to force a write of all buffered
* data that hasn't been output.
* In : r0 - pointer to console_t structure
@@ -270,6 +270,6 @@
cmp r0, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr r0, [r0, #CONSOLE_T_16550_BASE]
+ ldr r0, [r0, #CONSOLE_T_BASE]
b console_16550_core_flush
endfunc console_16550_flush
diff --git a/drivers/ti/uart/aarch64/16550_console.S b/drivers/ti/uart/aarch64/16550_console.S
index 80c1b86..0640227 100644
--- a/drivers/ti/uart/aarch64/16550_console.S
+++ b/drivers/ti/uart/aarch64/16550_console.S
@@ -88,7 +88,7 @@
/* -----------------------------------------------
* int console_16550_register(uintptr_t baseaddr,
* uint32_t clock, uint32_t baud,
- * console_16550_t *console);
+ * console_t *console);
* Function to initialize and register a new 16550
* console. Storage passed in for the console struct
* *must* be persistent (i.e. not from the stack).
@@ -98,7 +98,7 @@
* In: x0 - UART register base address
* w1 - UART clock in Hz
* w2 - Baud rate (ignored if w1 is 0)
- * x3 - pointer to empty console_16550_t struct
+ * x3 - pointer to empty console_t struct
* Out: return 1 on success, 0 on error
* Clobber list : x0, x1, x2, x6, x7, x14
* -----------------------------------------------
@@ -107,7 +107,7 @@
mov x7, x30
mov x6, x3
cbz x6, register_fail
- str x0, [x6, #CONSOLE_T_16550_BASE]
+ str x0, [x6, #CONSOLE_T_BASE]
/* A clock rate of zero means to skip the initialisation. */
cbz w1, register_16550
@@ -161,7 +161,7 @@
endfunc console_16550_core_putc
/* --------------------------------------------------------
- * int console_16550_putc(int c, console_16550_t *console)
+ * int console_16550_putc(int c, console_t *console)
* Function to output a character over the console. It
* returns the character printed on success or -1 on error.
* In : w0 - character to be printed
@@ -175,7 +175,7 @@
cmp x1, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr x1, [x1, #CONSOLE_T_16550_BASE]
+ ldr x1, [x1, #CONSOLE_T_BASE]
b console_16550_core_putc
endfunc console_16550_putc
@@ -206,7 +206,7 @@
endfunc console_16550_core_getc
/* ---------------------------------------------
- * int console_16550_getc(console_16550_t *console)
+ * int console_16550_getc(console_t *console)
* Function to get a character from the console.
* It returns the character grabbed on success
* or -1 on if no character is available.
@@ -220,7 +220,7 @@
cmp x1, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr x0, [x0, #CONSOLE_T_16550_BASE]
+ ldr x0, [x0, #CONSOLE_T_BASE]
b console_16550_core_getc
endfunc console_16550_getc
@@ -250,7 +250,7 @@
endfunc console_16550_core_flush
/* ---------------------------------------------
- * int console_16550_flush(console_pl011_t *console)
+ * int console_16550_flush(console_t *console)
* Function to force a write of all buffered
* data that hasn't been output.
* In : x0 - pointer to console_t structure
@@ -263,6 +263,6 @@
cmp x0, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr x0, [x0, #CONSOLE_T_16550_BASE]
+ ldr x0, [x0, #CONSOLE_T_BASE]
b console_16550_core_flush
endfunc console_16550_flush
diff --git a/fdts/fvp-base-gicv3-psci-dynamiq-2t.dts b/fdts/fvp-base-gicv3-psci-dynamiq-2t.dts
index daa2e66..6e63b43 100644
--- a/fdts/fvp-base-gicv3-psci-dynamiq-2t.dts
+++ b/fdts/fvp-base-gicv3-psci-dynamiq-2t.dts
@@ -8,34 +8,181 @@
#include "fvp-base-gicv3-psci-dynamiq-common.dtsi"
-&CPU0 {
- reg = <0x0 0x0>;
-};
+&CPU_MAP {
+ /delete-node/ cluster0;
-&CPU1 {
- reg = <0x0 0x1>;
+ cluster0 {
+ core0 {
+ thread0 {
+ cpu = <&CPU0>;
+ };
+ thread1 {
+ cpu = <&CPU1>;
+ };
+ };
+ core1 {
+ thread0 {
+ cpu = <&CPU2>;
+ };
+ thread1 {
+ cpu = <&CPU3>;
+ };
+ };
+ core2 {
+ thread0 {
+ cpu = <&CPU4>;
+ };
+ thread1 {
+ cpu = <&CPU5>;
+ };
+ };
+ core3 {
+ thread0 {
+ cpu = <&CPU6>;
+ };
+ thread1 {
+ cpu = <&CPU7>;
+ };
+ };
+ core4 {
+ thread0 {
+ cpu = <&CPU8>;
+ };
+ thread1 {
+ cpu = <&CPU9>;
+ };
+ };
+ core5 {
+ thread0 {
+ cpu = <&CPU10>;
+ };
+ thread1 {
+ cpu = <&CPU11>;
+ };
+ };
+ core6 {
+ thread0 {
+ cpu = <&CPU12>;
+ };
+ thread1 {
+ cpu = <&CPU13>;
+ };
+ };
+ core7 {
+ thread0 {
+ cpu = <&CPU14>;
+ };
+ thread1 {
+ cpu = <&CPU15>;
+ };
+ };
+ };
};
-&CPU2 {
- reg = <0x0 0x100>;
-};
+/ {
+ cpus {
+ CPU0:cpu@0 {
+ reg = <0x0 0x0>;
+ };
-&CPU3 {
- reg = <0x0 0x101>;
-};
+ CPU1:cpu@1 {
+ reg = <0x0 0x1>;
+ };
-&CPU4 {
- reg = <0x0 0x200>;
-};
+ CPU2:cpu@2 {
+ reg = <0x0 0x100>;
+ };
-&CPU5 {
- reg = <0x0 0x201>;
-};
+ CPU3:cpu@3 {
+ reg = <0x0 0x101>;
+ };
-&CPU6 {
- reg = <0x0 0x300>;
-};
+ CPU4:cpu@100 {
+ reg = <0x0 0x200>;
+ };
+
+ CPU5:cpu@101 {
+ reg = <0x0 0x201>;
+ };
+
+ CPU6:cpu@102 {
+ reg = <0x0 0x300>;
+ };
+
+ CPU7:cpu@103 {
+ reg = <0x0 0x301>;
+ };
+
+ CPU8:cpu@200 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0x400>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+ next-level-cache = <&L2_0>;
+ };
+
+ CPU9:cpu@201 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0x401>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+ next-level-cache = <&L2_0>;
+ };
+
+ CPU10:cpu@202 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0x500>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+ next-level-cache = <&L2_0>;
+ };
+
+ CPU11:cpu@203 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0x501>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+ next-level-cache = <&L2_0>;
+ };
+
+ CPU12:cpu@300 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0x600>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+ next-level-cache = <&L2_0>;
+ };
+
+ CPU13:cpu@301 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0x601>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+ next-level-cache = <&L2_0>;
+ };
+
+ CPU14:cpu@302 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0x700>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+ next-level-cache = <&L2_0>;
+ };
-&CPU7 {
- reg = <0x0 0x301>;
+ CPU15:cpu@303 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0x701>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+ next-level-cache = <&L2_0>;
+ };
+ };
};
diff --git a/include/drivers/amlogic/meson_console.h b/include/drivers/amlogic/meson_console.h
index 70e3b0b..8d52d79 100644
--- a/include/drivers/amlogic/meson_console.h
+++ b/include/drivers/amlogic/meson_console.h
@@ -9,17 +9,10 @@
#include <drivers/console.h>
-#define CONSOLE_T_MESON_BASE CONSOLE_T_DRVDATA
-
#ifndef __ASSEMBLER__
#include <stdint.h>
-typedef struct {
- console_t console;
- uintptr_t base;
-} console_meson_t;
-
/*
* Initialize a new meson console instance and register it with the console
* framework. The |console| pointer must point to storage that will be valid
@@ -30,7 +23,7 @@
* order to make this function future-proof.
*/
int console_meson_register(uintptr_t baseaddr, uint32_t clock, uint32_t baud,
- console_meson_t *console);
+ console_t *console);
#endif /*__ASSEMBLER__*/
diff --git a/include/drivers/arm/pl011.h b/include/drivers/arm/pl011.h
index 8733d19..ebc6643 100644
--- a/include/drivers/arm/pl011.h
+++ b/include/drivers/arm/pl011.h
@@ -81,17 +81,10 @@
#endif /* !PL011_GENERIC_UART */
-#define CONSOLE_T_PL011_BASE CONSOLE_T_DRVDATA
-
#ifndef __ASSEMBLER__
#include <stdint.h>
-typedef struct {
- console_t console;
- uintptr_t base;
-} console_pl011_t;
-
/*
* Initialize a new PL011 console instance and register it with the console
* framework. The |console| pointer must point to storage that will be valid
@@ -99,7 +92,7 @@
* Its contents will be reinitialized from scratch.
*/
int console_pl011_register(uintptr_t baseaddr, uint32_t clock, uint32_t baud,
- console_pl011_t *console);
+ console_t *console);
#endif /*__ASSEMBLER__*/
diff --git a/include/drivers/cadence/cdns_uart.h b/include/drivers/cadence/cdns_uart.h
index 64a062c..46ba466 100644
--- a/include/drivers/cadence/cdns_uart.h
+++ b/include/drivers/cadence/cdns_uart.h
@@ -25,17 +25,10 @@
#define R_UART_TX 0x30
#define R_UART_RX 0x30
-#define CONSOLE_T_CDNS_BASE CONSOLE_T_DRVDATA
-
#ifndef __ASSEMBLER__
#include <stdint.h>
-typedef struct {
- console_t console;
- uintptr_t base;
-} console_cdns_t;
-
/*
* Initialize a new Cadence console instance and register it with the console
* framework. The |console| pointer must point to storage that will be valid
@@ -43,7 +36,7 @@
* Its contents will be reinitialized from scratch.
*/
int console_cdns_register(uintptr_t baseaddr, uint32_t clock, uint32_t baud,
- console_cdns_t *console);
+ console_t *console);
#endif /*__ASSEMBLER__*/
diff --git a/include/drivers/console.h b/include/drivers/console.h
index a4859d8..761816a 100644
--- a/include/drivers/console.h
+++ b/include/drivers/console.h
@@ -14,7 +14,8 @@
#define CONSOLE_T_PUTC (U(2) * REGSZ)
#define CONSOLE_T_GETC (U(3) * REGSZ)
#define CONSOLE_T_FLUSH (U(4) * REGSZ)
-#define CONSOLE_T_DRVDATA (U(5) * REGSZ)
+#define CONSOLE_T_BASE (U(5) * REGSZ)
+#define CONSOLE_T_DRVDATA (U(6) * REGSZ)
#define CONSOLE_FLAG_BOOT (U(1) << 0)
#define CONSOLE_FLAG_RUNTIME (U(1) << 1)
@@ -43,6 +44,7 @@
int (*const putc)(int character, struct console *console);
int (*const getc)(struct console *console);
int (*const flush)(struct console *console);
+ uintptr_t base;
/* Additional private driver data may follow here. */
} console_t;
diff --git a/include/drivers/coreboot/cbmem_console.h b/include/drivers/coreboot/cbmem_console.h
index 40c90e6..30b39f1 100644
--- a/include/drivers/coreboot/cbmem_console.h
+++ b/include/drivers/coreboot/cbmem_console.h
@@ -9,14 +9,12 @@
#include <drivers/console.h>
-#define CONSOLE_T_CBMC_BASE CONSOLE_T_DRVDATA
-#define CONSOLE_T_CBMC_SIZE (CONSOLE_T_DRVDATA + REGSZ)
+#define CONSOLE_T_CBMC_SIZE CONSOLE_T_DRVDATA
#ifndef __ASSEMBLER__
typedef struct {
console_t console;
- uintptr_t base;
uint32_t size;
} console_cbmc_t;
diff --git a/include/drivers/marvell/uart/a3700_console.h b/include/drivers/marvell/uart/a3700_console.h
index 517f01a..5e3ab05 100644
--- a/include/drivers/marvell/uart/a3700_console.h
+++ b/include/drivers/marvell/uart/a3700_console.h
@@ -54,17 +54,10 @@
#define UART_CTRL_TXFIFO_RESET (1 << 15)
#define UARTLSR_TXFIFOEMPTY (1 << 6)
-#define CONSOLE_T_A3700_BASE CONSOLE_T_DRVDATA
-
#ifndef __ASSEMBLER__
#include <stdint.h>
-typedef struct {
- console_t console;
- uintptr_t base;
-} console_a3700_t;
-
/*
* Initialize a new a3700 console instance and register it with the console
* framework. The |console| pointer must point to storage that will be valid
@@ -72,7 +65,7 @@
* Its contents will be reinitialized from scratch.
*/
int console_a3700_register(uintptr_t baseaddr, uint32_t clock, uint32_t baud,
- console_a3700_t *console);
+ console_t *console);
#endif /*__ASSEMBLER__*/
diff --git a/include/drivers/renesas/rcar/console/console.h b/include/drivers/renesas/rcar/console/console.h
index 0e4ed8f..7d5b5d3 100644
--- a/include/drivers/renesas/rcar/console/console.h
+++ b/include/drivers/renesas/rcar/console/console.h
@@ -7,17 +7,10 @@
#ifndef RCAR_PRINTF_H
#define RCAR_PRINTF_H
-#define CONSOLE_T_RCAR_BASE CONSOLE_T_DRVDATA
-
#ifndef __ASSEMBLER__
#include <stdint.h>
-typedef struct {
- console_t console;
- uintptr_t base;
-} console_rcar_t;
-
/*
* Initialize a new rcar console instance and register it with the console
* framework. The |console| pointer must point to storage that will be valid
@@ -25,7 +18,7 @@
* Its contents will be reinitialized from scratch.
*/
int console_rcar_register(uintptr_t baseaddr, uint32_t clock, uint32_t baud,
- console_rcar_t *console);
+ console_t *console);
#endif /*__ASSEMBLER__*/
diff --git a/include/drivers/st/stm32_console.h b/include/drivers/st/stm32_console.h
index a2ad87c..8d9187d 100644
--- a/include/drivers/st/stm32_console.h
+++ b/include/drivers/st/stm32_console.h
@@ -9,17 +9,10 @@
#include <drivers/console.h>
-#define CONSOLE_T_STM32_BASE CONSOLE_T_DRVDATA
-
#ifndef __ASSEMBLER__
#include <stdint.h>
-struct console_stm32 {
- console_t console;
- uintptr_t base;
-};
-
/*
* Initialize a new STM32 console instance and register it with the console
* framework. The |console| pointer must point to storage that will be valid
@@ -27,7 +20,7 @@
* Its contents will be reinitialized from scratch.
*/
int console_stm32_register(uintptr_t baseaddr, uint32_t clock, uint32_t baud,
- struct console_stm32 *console);
+ console_t *console);
#endif /*__ASSEMBLER__*/
diff --git a/include/drivers/ti/uart/uart_16550.h b/include/drivers/ti/uart/uart_16550.h
index 2b95fa3..bddd997 100644
--- a/include/drivers/ti/uart/uart_16550.h
+++ b/include/drivers/ti/uart/uart_16550.h
@@ -71,17 +71,10 @@
#define UARTLSR_RDR_BIT (0) /* Rx Data Ready Bit */
#define UARTLSR_RDR (1 << UARTLSR_RDR_BIT) /* Rx Data Ready */
-#define CONSOLE_T_16550_BASE CONSOLE_T_DRVDATA
-
#ifndef __ASSEMBLER__
#include <stdint.h>
-typedef struct {
- console_t console;
- uintptr_t base;
-} console_16550_t;
-
/*
* Initialize a new 16550 console instance and register it with the console
* framework. The |console| pointer must point to storage that will be valid
@@ -94,7 +87,7 @@
* case as well.
*/
int console_16550_register(uintptr_t baseaddr, uint32_t clock, uint32_t baud,
- console_16550_t *console);
+ console_t *console);
#endif /*__ASSEMBLER__*/
diff --git a/include/lib/fconf/fconf.h b/include/lib/fconf/fconf.h
index f58ff57..0401e5c 100644
--- a/include/lib/fconf/fconf.h
+++ b/include/lib/fconf/fconf.h
@@ -14,9 +14,9 @@
#define FCONF_REGISTER_POPULATOR(name, callback) \
__attribute__((used, section(".fconf_populator"))) \
- const struct fconf_populator name##__populator = { \
- .info = #name, \
- .populate = callback \
+ const struct fconf_populator (name##__populator) = { \
+ .info = (#name), \
+ .populate = (callback) \
};
/*
diff --git a/include/lib/object_pool.h b/include/lib/object_pool.h
index 0f85331..66e8c47 100644
--- a/include/lib/object_pool.h
+++ b/include/lib/object_pool.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -56,13 +56,13 @@
*/
static inline void *pool_alloc_n(struct object_pool *pool, size_t count)
{
- if (pool->used + count > pool->capacity) {
+ if ((pool->used + count) > pool->capacity) {
ERROR("Cannot allocate %zu objects out of pool (%zu objects left).\n",
count, pool->capacity - pool->used);
panic();
}
- void *obj = (char *)(pool->objects) + pool->obj_size * pool->used;
+ void *obj = (char *)(pool->objects) + (pool->obj_size * pool->used);
pool->used += count;
return obj;
}
diff --git a/include/lib/xlat_tables/xlat_tables_v2.h b/include/lib/xlat_tables/xlat_tables_v2.h
index 0e09998..a80fab0 100644
--- a/include/lib/xlat_tables/xlat_tables_v2.h
+++ b/include/lib/xlat_tables/xlat_tables_v2.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -345,6 +345,16 @@
size_t size, uint32_t attr);
int xlat_change_mem_attributes(uintptr_t base_va, size_t size, uint32_t attr);
+#if PLAT_RO_XLAT_TABLES
+/*
+ * Change the memory attributes of the memory region encompassing the higher
+ * level translation tables to secure read-only data.
+ *
+ * Return 0 on success, a negative error code on error.
+ */
+int xlat_make_tables_readonly(void);
+#endif
+
/*
* Query the memory attributes of a memory page in a set of translation tables.
*
diff --git a/include/lib/xlat_tables/xlat_tables_v2_helpers.h b/include/lib/xlat_tables/xlat_tables_v2_helpers.h
index b17b71a..c88fa4d 100644
--- a/include/lib/xlat_tables/xlat_tables_v2_helpers.h
+++ b/include/lib/xlat_tables/xlat_tables_v2_helpers.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -70,6 +70,9 @@
*/
uint64_t (*tables)[XLAT_TABLE_ENTRIES];
int tables_num;
+#if PLAT_RO_XLAT_TABLES
+ bool readonly_tables;
+#endif
/*
* Keep track of how many regions are mapped in each table. The base
* table can't be unmapped so it isn't needed to keep track of it.
@@ -122,6 +125,14 @@
/* do nothing */
#endif /* PLAT_XLAT_TABLES_DYNAMIC */
+#if PLAT_RO_XLAT_TABLES
+#define XLAT_CTX_INIT_TABLE_ATTR() \
+ .readonly_tables = false,
+#else
+#define XLAT_CTX_INIT_TABLE_ATTR()
+ /* do nothing */
+#endif
+
#define REGISTER_XLAT_CONTEXT_FULL_SPEC(_ctx_name, _mmap_count, \
_xlat_tables_count, _virt_addr_space_size, \
_phy_addr_space_size, _xlat_regime, _section_name)\
@@ -142,22 +153,63 @@
XLAT_ALLOC_DYNMAP_STRUCT(_ctx_name, _xlat_tables_count) \
\
static xlat_ctx_t _ctx_name##_xlat_ctx = { \
- .va_max_address = (_virt_addr_space_size) - 1UL, \
.pa_max_address = (_phy_addr_space_size) - 1ULL, \
+ .va_max_address = (_virt_addr_space_size) - 1UL, \
.mmap = _ctx_name##_mmap, \
.mmap_num = (_mmap_count), \
- .base_level = GET_XLAT_TABLE_LEVEL_BASE(_virt_addr_space_size),\
+ .tables = _ctx_name##_xlat_tables, \
+ .tables_num = _xlat_tables_count, \
+ XLAT_CTX_INIT_TABLE_ATTR() \
+ XLAT_REGISTER_DYNMAP_STRUCT(_ctx_name) \
+ .next_table = 0, \
.base_table = _ctx_name##_base_xlat_table, \
.base_table_entries = \
GET_NUM_BASE_LEVEL_ENTRIES(_virt_addr_space_size),\
+ .max_pa = 0U, \
+ .max_va = 0U, \
+ .base_level = GET_XLAT_TABLE_LEVEL_BASE(_virt_addr_space_size),\
+ .initialized = false, \
+ .xlat_regime = (_xlat_regime) \
+ }
+
+#define REGISTER_XLAT_CONTEXT_RO_BASE_TABLE(_ctx_name, _mmap_count, \
+ _xlat_tables_count, _virt_addr_space_size, \
+ _phy_addr_space_size, _xlat_regime, _section_name)\
+ CASSERT(CHECK_PHY_ADDR_SPACE_SIZE(_phy_addr_space_size), \
+ assert_invalid_physical_addr_space_sizefor_##_ctx_name);\
+ \
+ static mmap_region_t _ctx_name##_mmap[_mmap_count + 1]; \
+ \
+ static uint64_t _ctx_name##_xlat_tables[_xlat_tables_count] \
+ [XLAT_TABLE_ENTRIES] \
+ __aligned(XLAT_TABLE_SIZE) __section(_section_name); \
+ \
+ static uint64_t _ctx_name##_base_xlat_table \
+ [GET_NUM_BASE_LEVEL_ENTRIES(_virt_addr_space_size)] \
+ __aligned(GET_NUM_BASE_LEVEL_ENTRIES(_virt_addr_space_size)\
+ * sizeof(uint64_t)) \
+ __section(".rodata"); \
+ \
+ XLAT_ALLOC_DYNMAP_STRUCT(_ctx_name, _xlat_tables_count) \
+ \
+ static xlat_ctx_t _ctx_name##_xlat_ctx = { \
+ .pa_max_address = (_phy_addr_space_size) - 1ULL, \
+ .va_max_address = (_virt_addr_space_size) - 1UL, \
+ .mmap = _ctx_name##_mmap, \
+ .mmap_num = (_mmap_count), \
.tables = _ctx_name##_xlat_tables, \
.tables_num = _xlat_tables_count, \
+ XLAT_CTX_INIT_TABLE_ATTR() \
XLAT_REGISTER_DYNMAP_STRUCT(_ctx_name) \
- .xlat_regime = (_xlat_regime), \
+ .next_table = 0, \
+ .base_table = _ctx_name##_base_xlat_table, \
+ .base_table_entries = \
+ GET_NUM_BASE_LEVEL_ENTRIES(_virt_addr_space_size),\
.max_pa = 0U, \
.max_va = 0U, \
- .next_table = 0, \
+ .base_level = GET_XLAT_TABLE_LEVEL_BASE(_virt_addr_space_size),\
.initialized = false, \
+ .xlat_regime = (_xlat_regime) \
}
#endif /*__ASSEMBLER__*/
diff --git a/include/plat/arm/common/plat_arm.h b/include/plat/arm/common/plat_arm.h
index 025a64f..862e73a 100644
--- a/include/plat/arm/common/plat_arm.h
+++ b/include/plat/arm/common/plat_arm.h
@@ -237,6 +237,11 @@
void arm_free_init_memory(void);
/*
+ * Make the higher level translation tables read-only
+ */
+void arm_xlat_make_tables_readonly(void);
+
+/*
* Mandatory functions required in ARM standard platforms
*/
unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr);
diff --git a/lib/aarch64/cache_helpers.S b/lib/aarch64/cache_helpers.S
index 9ef8ca7..de9c8e4 100644
--- a/lib/aarch64/cache_helpers.S
+++ b/lib/aarch64/cache_helpers.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -30,7 +30,7 @@
dc \op, x0
add x0, x0, x2
cmp x0, x1
- b.lo loop_\op
+ b.lo loop_\op
dsb sy
exit_loop_\op:
ret
@@ -140,7 +140,7 @@
level_done:
add x10, x10, #2 // increment cache number
cmp x3, x10
- b.hi loop1
+ b.hi loop1
msr csselr_el1, xzr // select cache level 0 in csselr
dsb sy // barrier to complete final cache operation
isb
diff --git a/lib/coreboot/coreboot_table.c b/lib/coreboot/coreboot_table.c
index 63bdc63..253fac2 100644
--- a/lib/coreboot/coreboot_table.c
+++ b/lib/coreboot/coreboot_table.c
@@ -75,7 +75,7 @@
static void setup_cbmem_console(uintptr_t baseaddr)
{
static console_cbmc_t console;
- assert(!console.base); /* should only have one CBMEM console */
+ assert(!console.console.base); /* should only have one CBMEM console */
/* CBMEM console structure stores its size in first header field. */
uint32_t size = *(uint32_t *)baseaddr;
diff --git a/lib/xlat_tables_v2/ro_xlat_tables.mk b/lib/xlat_tables_v2/ro_xlat_tables.mk
new file mode 100644
index 0000000..7991e1a
--- /dev/null
+++ b/lib/xlat_tables_v2/ro_xlat_tables.mk
@@ -0,0 +1,37 @@
+#
+# Copyright (c) 2020, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+ifeq (${USE_DEBUGFS}, 1)
+ $(error "Debugfs requires functionality from the dynamic translation \
+ library and is incompatible with ALLOW_RO_XLAT_TABLES.")
+endif
+
+ifeq (${ARCH},aarch32)
+ ifeq (${RESET_TO_SP_MIN},1)
+ $(error "RESET_TO_SP_MIN requires functionality from the dynamic \
+ translation library and is incompatible with \
+ ALLOW_RO_XLAT_TABLES.")
+ endif
+else # if AArch64
+ ifeq (${PLAT},tegra)
+ $(error "Tegra requires functionality from the dynamic translation \
+ library and is incompatible with ALLOW_RO_XLAT_TABLES.")
+ endif
+ ifeq (${RESET_TO_BL31},1)
+ $(error "RESET_TO_BL31 requires functionality from the dynamic \
+ translation library and is incompatible with \
+ ALLOW_RO_XLAT_TABLES.")
+ endif
+ ifeq (${SPD},trusty)
+ $(error "Trusty requires functionality from the dynamic translation \
+ library and is incompatible with ALLOW_RO_XLAT_TABLES.")
+ endif
+ ifeq (${SPM_MM},1)
+ $(error "SPM_MM requires functionality to change memory region \
+ attributes, which is not possible once the translation tables \
+ have been made read-only.")
+ endif
+endif
diff --git a/lib/xlat_tables_v2/xlat_tables.mk b/lib/xlat_tables_v2/xlat_tables.mk
index c946315..bcc3e68 100644
--- a/lib/xlat_tables_v2/xlat_tables.mk
+++ b/lib/xlat_tables_v2/xlat_tables.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -13,3 +13,7 @@
XLAT_TABLES_LIB_V2 := 1
$(eval $(call add_define,XLAT_TABLES_LIB_V2))
+
+ifeq (${ALLOW_RO_XLAT_TABLES}, 1)
+ include lib/xlat_tables_v2/ro_xlat_tables.mk
+endif
diff --git a/lib/xlat_tables_v2/xlat_tables_context.c b/lib/xlat_tables_v2/xlat_tables_context.c
index f4b64b3..adca578 100644
--- a/lib/xlat_tables_v2/xlat_tables_context.c
+++ b/lib/xlat_tables_v2/xlat_tables_context.c
@@ -1,9 +1,10 @@
/*
- * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
+#include <arch_helpers.h>
#include <assert.h>
#include <platform_def.h>
@@ -24,8 +25,14 @@
* Allocate and initialise the default translation context for the BL image
* currently executing.
*/
+#if PLAT_RO_XLAT_TABLES
+REGISTER_XLAT_CONTEXT_RO_BASE_TABLE(tf, MAX_MMAP_REGIONS, MAX_XLAT_TABLES,
+ PLAT_VIRT_ADDR_SPACE_SIZE, PLAT_PHY_ADDR_SPACE_SIZE,
+ EL_REGIME_INVALID, "xlat_table");
+#else
REGISTER_XLAT_CONTEXT(tf, MAX_MMAP_REGIONS, MAX_XLAT_TABLES,
PLAT_VIRT_ADDR_SPACE_SIZE, PLAT_PHY_ADDR_SPACE_SIZE);
+#endif
void mmap_add_region(unsigned long long base_pa, uintptr_t base_va, size_t size,
unsigned int attr)
@@ -119,6 +126,75 @@
return xlat_change_mem_attributes_ctx(&tf_xlat_ctx, base_va, size, attr);
}
+#if PLAT_RO_XLAT_TABLES
+/* Change the memory attributes of the descriptors which resolve the address
+ * range that belongs to the translation tables themselves, which are by default
+ * mapped as part of read-write data in the BL image's memory.
+ *
+ * Since the translation tables map themselves via these level 3 (page)
+ * descriptors, any change applied to them with the MMU on would introduce a
+ * chicken and egg problem because of the break-before-make sequence.
+ * Eventually, it would reach the descriptor that resolves the very table it
+ * belongs to and the invalidation (break step) would cause the subsequent write
+ * (make step) to it to generate an MMU fault. Therefore, the MMU is disabled
+ * before making the change.
+ *
+ * No assumption is made about what data this function needs, therefore all the
+ * caches are flushed in order to ensure coherency. A future optimization would
+ * be to only flush the required data to main memory.
+ */
+int xlat_make_tables_readonly(void)
+{
+ assert(tf_xlat_ctx.initialized == true);
+#ifdef __aarch64__
+ if (tf_xlat_ctx.xlat_regime == EL1_EL0_REGIME) {
+ disable_mmu_el1();
+ } else if (tf_xlat_ctx.xlat_regime == EL3_REGIME) {
+ disable_mmu_el3();
+ } else {
+ assert(tf_xlat_ctx.xlat_regime == EL2_REGIME);
+ return -1;
+ }
+
+ /* Flush all caches. */
+ dcsw_op_all(DCCISW);
+#else /* !__aarch64__ */
+ assert(tf_xlat_ctx.xlat_regime == EL1_EL0_REGIME);
+ /* On AArch32, we flush the caches before disabling the MMU. The reason
+ * for this is that the dcsw_op_all AArch32 function pushes some
+ * registers onto the stack under the assumption that it is writing to
+ * cache, which is not true with the MMU off. This would result in the
+ * stack becoming corrupted and a wrong/junk value for the LR being
+ * restored at the end of the routine.
+ */
+ dcsw_op_all(DC_OP_CISW);
+ disable_mmu_secure();
+#endif
+
+ int rc = xlat_change_mem_attributes_ctx(&tf_xlat_ctx,
+ (uintptr_t)tf_xlat_ctx.tables,
+ tf_xlat_ctx.tables_num * XLAT_TABLE_SIZE,
+ MT_RO_DATA | MT_SECURE);
+
+#ifdef __aarch64__
+ if (tf_xlat_ctx.xlat_regime == EL1_EL0_REGIME) {
+ enable_mmu_el1(0U);
+ } else {
+ assert(tf_xlat_ctx.xlat_regime == EL3_REGIME);
+ enable_mmu_el3(0U);
+ }
+#else /* !__aarch64__ */
+ enable_mmu_svc_mon(0U);
+#endif
+
+ if (rc == 0) {
+ tf_xlat_ctx.readonly_tables = true;
+ }
+
+ return rc;
+}
+#endif /* PLAT_RO_XLAT_TABLES */
+
/*
* If dynamic allocation of new regions is disabled then by the time we call the
* function enabling the MMU, we'll have registered all the memory regions to
diff --git a/make_helpers/build_macros.mk b/make_helpers/build_macros.mk
index b6925d3..032e42c 100644
--- a/make_helpers/build_macros.mk
+++ b/make_helpers/build_macros.mk
@@ -79,32 +79,32 @@
endef
# IMG_LINKERFILE defines the linker script corresponding to a BL stage
-# $(1) = BL stage (2, 30, 31, 32, 33)
+# $(1) = BL stage (1, 2, 2u, 31, 32)
define IMG_LINKERFILE
${BUILD_DIR}/bl$(1).ld
endef
# IMG_MAPFILE defines the output file describing the memory map corresponding
# to a BL stage
-# $(1) = BL stage (2, 30, 31, 32, 33)
+# $(1) = BL stage (1, 2, 2u, 31, 32)
define IMG_MAPFILE
${BUILD_DIR}/bl$(1).map
endef
# IMG_ELF defines the elf file corresponding to a BL stage
-# $(1) = BL stage (2, 30, 31, 32, 33)
+# $(1) = BL stage (1, 2, 2u, 31, 32)
define IMG_ELF
${BUILD_DIR}/bl$(1).elf
endef
# IMG_DUMP defines the symbols dump file corresponding to a BL stage
-# $(1) = BL stage (2, 30, 31, 32, 33)
+# $(1) = BL stage (1, 2, 2u, 31, 32)
define IMG_DUMP
${BUILD_DIR}/bl$(1).dump
endef
# IMG_BIN defines the default image file corresponding to a BL stage
-# $(1) = BL stage (2, 30, 31, 32, 33)
+# $(1) = BL stage (1, 2, 2u, 31, 32)
define IMG_BIN
${BUILD_PLAT}/bl$(1).bin
endef
@@ -237,7 +237,7 @@
# MAKE_C builds a C source file and generates the dependency file
# $(1) = output directory
# $(2) = source file (%.c)
-# $(3) = BL stage (2, 2u, 30, 31, 32, 33)
+# $(3) = BL stage (1, 2, 2u, 31, 32)
define MAKE_C
$(eval OBJ := $(1)/$(patsubst %.c,%.o,$(notdir $(2))))
@@ -257,7 +257,7 @@
# MAKE_S builds an assembly source file and generates the dependency file
# $(1) = output directory
# $(2) = assembly file (%.S)
-# $(3) = BL stage (2, 2u, 30, 31, 32, 33)
+# $(3) = BL stage (1, 2, 2u, 31, 32)
define MAKE_S
$(eval OBJ := $(1)/$(patsubst %.S,%.o,$(notdir $(2))))
@@ -276,7 +276,7 @@
# MAKE_LD generate the linker script using the C preprocessor
# $(1) = output linker script
# $(2) = input template
-# $(3) = BL stage (2, 2u, 30, 31, 32, 33)
+# $(3) = BL stage (1, 2, 2u, 31, 32)
define MAKE_LD
$(eval DEP := $(1).d)
@@ -310,7 +310,7 @@
# MAKE_OBJS builds both C and assembly source files
# $(1) = output directory
# $(2) = list of source files (both C and assembly)
-# $(3) = BL stage (2, 30, 31, 32, 33)
+# $(3) = BL stage (1, 2, 2u, 31, 32)
define MAKE_OBJS
$(eval C_OBJS := $(filter %.c,$(2)))
$(eval REMAIN := $(filter-out %.c,$(2)))
@@ -387,7 +387,7 @@
# MAKE_BL macro defines the targets and options to build each BL image.
# Arguments:
-# $(1) = BL stage (2, 2u, 30, 31, 32, 33)
+# $(1) = BL stage (1, 2, 2u, 31, 32)
# $(2) = FIP command line option (if empty, image will not be included in the FIP)
# $(3) = FIP prefix (optional) (if FWU_, target is fwu_fip instead of fip)
define MAKE_BL
diff --git a/make_helpers/defaults.mk b/make_helpers/defaults.mk
index e8e990d..60958a1 100644
--- a/make_helpers/defaults.mk
+++ b/make_helpers/defaults.mk
@@ -207,6 +207,13 @@
# Build option to choose whether Trusted Firmware uses library at ROM
USE_ROMLIB := 0
+# Build option to choose whether the xlat tables of BL images can be read-only.
+# Note that this only serves as a higher level option to PLAT_RO_XLAT_TABLES,
+# which is the per BL-image option that actually enables the read-only tables
+# API. The reason for having this additional option is to have a common high
+# level makefile where we can check for incompatible features/build options.
+ALLOW_RO_XLAT_TABLES := 0
+
# Chain of trust.
COT := tbbr
diff --git a/plat/allwinner/common/allwinner-common.mk b/plat/allwinner/common/allwinner-common.mk
index 98bcf3e..e60ebc6 100644
--- a/plat/allwinner/common/allwinner-common.mk
+++ b/plat/allwinner/common/allwinner-common.mk
@@ -20,6 +20,8 @@
${AW_PLAT}/common/sunxi_common.c
BL31_SOURCES += drivers/allwinner/axp/common.c \
+ drivers/allwinner/sunxi_msgbox.c \
+ drivers/arm/css/scpi/css_scpi.c \
drivers/arm/gic/common/gic_common.c \
drivers/arm/gic/v2/gicv2_helpers.c \
drivers/arm/gic/v2/gicv2_main.c \
diff --git a/plat/allwinner/common/include/platform_def.h b/plat/allwinner/common/include/platform_def.h
index 32a7c04..975cc48 100644
--- a/plat/allwinner/common/include/platform_def.h
+++ b/plat/allwinner/common/include/platform_def.h
@@ -13,8 +13,13 @@
#include <sunxi_mmap.h>
-#define BL31_BASE SUNXI_SRAM_A2_BASE
-#define BL31_LIMIT (SUNXI_SRAM_A2_BASE + SUNXI_SRAM_A2_SIZE)
+#define BL31_BASE (SUNXI_SRAM_A2_BASE + 0x4000)
+#define BL31_LIMIT (SUNXI_SRAM_A2_BASE + \
+ SUNXI_SRAM_A2_SIZE - SUNXI_SCP_SIZE)
+
+/* The SCP firmware is allocated the last 16KiB of SRAM A2. */
+#define SUNXI_SCP_BASE BL31_LIMIT
+#define SUNXI_SCP_SIZE 0x4000
/* Overwrite U-Boot SPL, but reserve the first page for the SPL header. */
#define BL31_NOBITS_BASE (SUNXI_SRAM_A1_BASE + 0x1000)
@@ -35,6 +40,9 @@
#define MAX_MMAP_REGIONS (3 + PLATFORM_MMAP_REGIONS)
#define MAX_XLAT_TABLES 1
+#define PLAT_CSS_SCP_COM_SHARED_MEM_BASE \
+ (SUNXI_SRAM_A2_BASE + SUNXI_SRAM_A2_SIZE - 0x200)
+
#define PLAT_MAX_PWR_LVL_STATES U(2)
#define PLAT_MAX_RET_STATE U(1)
#define PLAT_MAX_OFF_STATE U(2)
@@ -51,7 +59,7 @@
#define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER_COUNT * \
PLATFORM_MAX_CPUS_PER_CLUSTER)
#define PLATFORM_MAX_CPUS_PER_CLUSTER U(4)
-#define PLATFORM_MMAP_REGIONS 4
+#define PLATFORM_MMAP_REGIONS 5
#define PLATFORM_STACK_SIZE (0x1000 / PLATFORM_CORE_COUNT)
#ifndef SPD_none
diff --git a/plat/allwinner/common/sunxi_bl31_setup.c b/plat/allwinner/common/sunxi_bl31_setup.c
index a24527c..e836a34 100644
--- a/plat/allwinner/common/sunxi_bl31_setup.c
+++ b/plat/allwinner/common/sunxi_bl31_setup.c
@@ -28,7 +28,7 @@
static entry_point_info_t bl32_image_ep_info;
static entry_point_info_t bl33_image_ep_info;
-static console_16550_t console;
+static console_t console;
static const gicv2_driver_data_t sunxi_gic_data = {
.gicd_base = SUNXI_GICD_BASE,
diff --git a/plat/allwinner/common/sunxi_common.c b/plat/allwinner/common/sunxi_common.c
index 3759c28..0ca18ad 100644
--- a/plat/allwinner/common/sunxi_common.c
+++ b/plat/allwinner/common/sunxi_common.c
@@ -21,6 +21,8 @@
static const mmap_region_t sunxi_mmap[PLATFORM_MMAP_REGIONS + 1] = {
MAP_REGION_FLAT(SUNXI_SRAM_BASE, SUNXI_SRAM_SIZE,
MT_RW_DATA | MT_SECURE),
+ MAP_REGION_FLAT(SUNXI_SCP_BASE, SUNXI_SCP_SIZE,
+ MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER),
MAP_REGION_FLAT(SUNXI_DEV_BASE, SUNXI_DEV_SIZE,
MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER),
MAP_REGION(SUNXI_DRAM_BASE, SUNXI_DRAM_VIRT_BASE, SUNXI_DRAM_SEC_SIZE,
@@ -175,7 +177,7 @@
*/
void sunxi_execute_arisc_code(uint32_t *code, size_t size, uint16_t param)
{
- uintptr_t arisc_reset_vec = SUNXI_SRAM_A2_BASE - 0x4000 + 0x100;
+ uintptr_t arisc_reset_vec = SUNXI_SRAM_A2_BASE + 0x100;
do {
bakery_lock_get(&arisc_lock);
diff --git a/plat/allwinner/common/sunxi_pm.c b/plat/allwinner/common/sunxi_pm.c
index 9b074d2..e0fa5b3 100644
--- a/plat/allwinner/common/sunxi_pm.c
+++ b/plat/allwinner/common/sunxi_pm.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -10,6 +10,7 @@
#include <arch_helpers.h>
#include <common/debug.h>
+#include <drivers/arm/css/css_scpi.h>
#include <drivers/arm/gicv2.h>
#include <drivers/delay_timer.h>
#include <lib/mmio.h>
@@ -17,6 +18,7 @@
#include <plat/common/platform.h>
#include <sunxi_cpucfg.h>
+#include <sunxi_def.h>
#include <sunxi_mmap.h>
#include <sunxi_private.h>
@@ -24,25 +26,88 @@
#define SUNXI_WDOG0_CFG_REG (SUNXI_R_WDOG_BASE + 0x0014)
#define SUNXI_WDOG0_MODE_REG (SUNXI_R_WDOG_BASE + 0x0018)
-#define mpidr_is_valid(mpidr) ( \
- MPIDR_AFFLVL3_VAL(mpidr) == 0 && \
- MPIDR_AFFLVL2_VAL(mpidr) == 0 && \
- MPIDR_AFFLVL1_VAL(mpidr) < PLATFORM_CLUSTER_COUNT && \
- MPIDR_AFFLVL0_VAL(mpidr) < PLATFORM_MAX_CPUS_PER_CLUSTER)
+#define CPU_PWR_LVL MPIDR_AFFLVL0
+#define CLUSTER_PWR_LVL MPIDR_AFFLVL1
+#define SYSTEM_PWR_LVL MPIDR_AFFLVL2
+
+#define CPU_PWR_STATE(state) \
+ ((state)->pwr_domain_state[CPU_PWR_LVL])
+#define CLUSTER_PWR_STATE(state) \
+ ((state)->pwr_domain_state[CLUSTER_PWR_LVL])
+#define SYSTEM_PWR_STATE(state) \
+ ((state)->pwr_domain_state[SYSTEM_PWR_LVL])
+
+#define mpidr_is_valid(mpidr) (plat_core_pos_by_mpidr(mpidr) >= 0)
+
+/*
+ * The addresses for the SCP exception vectors are defined in the or1k
+ * architecture specification.
+ */
+#define OR1K_VEC_FIRST 0x01
+#define OR1K_VEC_LAST 0x0e
+#define OR1K_VEC_ADDR(n) (0x100 * (n))
+
+/*
+ * This magic value is the little-endian representation of the or1k
+ * instruction "l.mfspr r2, r0, 0x12", which is guaranteed to be the
+ * first instruction in the SCP firmware.
+ */
+#define SCP_FIRMWARE_MAGIC 0xb4400012
+
+static bool scpi_available;
+
+static inline scpi_power_state_t scpi_map_state(plat_local_state_t psci_state)
+{
+ if (is_local_state_run(psci_state))
+ return scpi_power_on;
+ if (is_local_state_retn(psci_state))
+ return scpi_power_retention;
+ return scpi_power_off;
+}
+
+static void sunxi_cpu_standby(plat_local_state_t cpu_state)
+{
+ u_register_t scr = read_scr_el3();
+
+ assert(is_local_state_retn(cpu_state));
+
+ write_scr_el3(scr | SCR_IRQ_BIT);
+ wfi();
+ write_scr_el3(scr);
+}
static int sunxi_pwr_domain_on(u_register_t mpidr)
{
if (mpidr_is_valid(mpidr) == 0)
return PSCI_E_INTERN_FAIL;
- sunxi_cpu_on(mpidr);
+ if (scpi_available) {
+ scpi_set_css_power_state(mpidr,
+ scpi_power_on,
+ scpi_power_on,
+ scpi_power_on);
+ } else {
+ sunxi_cpu_on(mpidr);
+ }
return PSCI_E_SUCCESS;
}
static void sunxi_pwr_domain_off(const psci_power_state_t *target_state)
{
- gicv2_cpuif_disable();
+ plat_local_state_t cpu_pwr_state = CPU_PWR_STATE(target_state);
+ plat_local_state_t cluster_pwr_state = CLUSTER_PWR_STATE(target_state);
+ plat_local_state_t system_pwr_state = SYSTEM_PWR_STATE(target_state);
+
+ if (is_local_state_off(cpu_pwr_state))
+ gicv2_cpuif_disable();
+
+ if (scpi_available) {
+ scpi_set_css_power_state(read_mpidr(),
+ scpi_map_state(cpu_pwr_state),
+ scpi_map_state(cluster_pwr_state),
+ scpi_map_state(system_pwr_state));
+ }
}
static void __dead2 sunxi_pwr_down_wfi(const psci_power_state_t *target_state)
@@ -55,12 +120,26 @@
static void sunxi_pwr_domain_on_finish(const psci_power_state_t *target_state)
{
- gicv2_pcpu_distif_init();
- gicv2_cpuif_enable();
+ if (is_local_state_off(SYSTEM_PWR_STATE(target_state)))
+ gicv2_distif_init();
+ if (is_local_state_off(CPU_PWR_STATE(target_state))) {
+ gicv2_pcpu_distif_init();
+ gicv2_cpuif_enable();
+ }
}
static void __dead2 sunxi_system_off(void)
{
+ gicv2_cpuif_disable();
+
+ if (scpi_available) {
+ /* Send the power down request to the SCP */
+ uint32_t ret = scpi_sys_power_state(scpi_system_shutdown);
+
+ if (ret != SCP_OK)
+ ERROR("PSCI: SCPI %s failed: %d\n", "shutdown", ret);
+ }
+
/* Turn off all secondary CPUs */
sunxi_disable_secondary_cpus(read_mpidr());
@@ -74,6 +153,16 @@
static void __dead2 sunxi_system_reset(void)
{
+ gicv2_cpuif_disable();
+
+ if (scpi_available) {
+ /* Send the system reset request to the SCP */
+ uint32_t ret = scpi_sys_power_state(scpi_system_reboot);
+
+ if (ret != SCP_OK)
+ ERROR("PSCI: SCPI %s failed: %d\n", "reboot", ret);
+ }
+
/* Reset the whole system when the watchdog times out */
mmio_write_32(SUNXI_WDOG0_CFG_REG, 1);
/* Enable the watchdog with the shortest timeout (0.5 seconds) */
@@ -86,6 +175,40 @@
panic();
}
+static int sunxi_validate_power_state(unsigned int power_state,
+ psci_power_state_t *req_state)
+{
+ unsigned int power_level = psci_get_pstate_pwrlvl(power_state);
+ unsigned int type = psci_get_pstate_type(power_state);
+
+ assert(req_state != NULL);
+
+ if (power_level > PLAT_MAX_PWR_LVL)
+ return PSCI_E_INVALID_PARAMS;
+
+ if (type == PSTATE_TYPE_STANDBY) {
+ /* Only one retention power state is supported. */
+ if (psci_get_pstate_id(power_state) > 0)
+ return PSCI_E_INVALID_PARAMS;
+ /* The SoC cannot be suspended without losing state */
+ if (power_level == SYSTEM_PWR_LVL)
+ return PSCI_E_INVALID_PARAMS;
+ for (unsigned int i = 0; i <= power_level; ++i)
+ req_state->pwr_domain_state[i] = PLAT_MAX_RET_STATE;
+ } else {
+ /* Only one off power state is supported. */
+ if (psci_get_pstate_id(power_state) > 0)
+ return PSCI_E_INVALID_PARAMS;
+ for (unsigned int i = 0; i <= power_level; ++i)
+ req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE;
+ }
+ /* Higher power domain levels should all remain running */
+ for (unsigned int i = power_level + 1; i <= PLAT_MAX_PWR_LVL; ++i)
+ req_state->pwr_domain_state[i] = PSCI_LOCAL_STATE_RUN;
+
+ return PSCI_E_SUCCESS;
+}
+
static int sunxi_validate_ns_entrypoint(uintptr_t ns_entrypoint)
{
/* The non-secure entry point must be in DRAM */
@@ -95,13 +218,45 @@
return PSCI_E_INVALID_ADDRESS;
}
+static void sunxi_get_sys_suspend_power_state(psci_power_state_t *req_state)
+{
+ assert(req_state);
+
+ for (unsigned int i = 0; i <= PLAT_MAX_PWR_LVL; ++i)
+ req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE;
+}
+
+static int sunxi_get_node_hw_state(u_register_t mpidr,
+ unsigned int power_level)
+{
+ unsigned int cluster_state, cpu_state;
+ unsigned int cpu = MPIDR_AFFLVL0_VAL(mpidr);
+
+ /* SoC power level (always on if PSCI works). */
+ if (power_level == SYSTEM_PWR_LVL)
+ return HW_ON;
+ if (scpi_get_css_power_state(mpidr, &cpu_state, &cluster_state))
+ return PSCI_E_NOT_SUPPORTED;
+ /* Cluster power level (full power state available). */
+ if (power_level == CLUSTER_PWR_LVL) {
+ if (cluster_state == scpi_power_on)
+ return HW_ON;
+ if (cluster_state == scpi_power_retention)
+ return HW_STANDBY;
+ return HW_OFF;
+ }
+ /* CPU power level (one bit boolean for on or off). */
+ return ((cpu_state & BIT(cpu)) != 0) ? HW_ON : HW_OFF;
+}
+
static plat_psci_ops_t sunxi_psci_ops = {
+ .cpu_standby = sunxi_cpu_standby,
.pwr_domain_on = sunxi_pwr_domain_on,
.pwr_domain_off = sunxi_pwr_domain_off,
- .pwr_domain_pwr_down_wfi = sunxi_pwr_down_wfi,
.pwr_domain_on_finish = sunxi_pwr_domain_on_finish,
.system_off = sunxi_system_off,
.system_reset = sunxi_system_reset,
+ .validate_power_state = sunxi_validate_power_state,
.validate_ns_entrypoint = sunxi_validate_ns_entrypoint,
};
@@ -110,13 +265,44 @@
{
assert(psci_ops);
- for (int cpu = 0; cpu < PLATFORM_CORE_COUNT; cpu += 1) {
+ /* Program all CPU entry points. */
+ for (unsigned int cpu = 0; cpu < PLATFORM_CORE_COUNT; ++cpu) {
mmio_write_32(SUNXI_CPUCFG_RVBAR_LO_REG(cpu),
sec_entrypoint & 0xffffffff);
mmio_write_32(SUNXI_CPUCFG_RVBAR_HI_REG(cpu),
sec_entrypoint >> 32);
}
+ /* Check for a valid SCP firmware, and boot the SCP if found. */
+ if (mmio_read_32(SUNXI_SCP_BASE) == SCP_FIRMWARE_MAGIC) {
+ /* Program SCP exception vectors to the firmware entrypoint. */
+ for (unsigned int i = OR1K_VEC_FIRST; i <= OR1K_VEC_LAST; ++i) {
+ uint32_t vector = SUNXI_SRAM_A2_BASE + OR1K_VEC_ADDR(i);
+ uint32_t offset = SUNXI_SCP_BASE - vector;
+
+ mmio_write_32(vector, offset >> 2);
+ clean_dcache_range(vector, sizeof(uint32_t));
+ }
+ /* Take the SCP out of reset. */
+ mmio_setbits_32(SUNXI_R_CPUCFG_BASE, BIT(0));
+ /* Wait for the SCP firmware to boot. */
+ if (scpi_wait_ready() == 0)
+ scpi_available = true;
+ }
+
+ NOTICE("PSCI: System suspend is %s\n",
+ scpi_available ? "available via SCPI" : "unavailable");
+ if (scpi_available) {
+ /* Suspend is only available via SCPI. */
+ sunxi_psci_ops.pwr_domain_suspend = sunxi_pwr_domain_off;
+ sunxi_psci_ops.pwr_domain_suspend_finish = sunxi_pwr_domain_on_finish;
+ sunxi_psci_ops.get_sys_suspend_power_state = sunxi_get_sys_suspend_power_state;
+ sunxi_psci_ops.get_node_hw_state = sunxi_get_node_hw_state;
+ } else {
+ /* This is only needed when SCPI is unavailable. */
+ sunxi_psci_ops.pwr_domain_pwr_down_wfi = sunxi_pwr_down_wfi;
+ }
+
*psci_ops = &sunxi_psci_ops;
return 0;
diff --git a/plat/allwinner/sun50i_a64/include/sunxi_mmap.h b/plat/allwinner/sun50i_a64/include/sunxi_mmap.h
index db44091..9d2542f 100644
--- a/plat/allwinner/sun50i_a64/include/sunxi_mmap.h
+++ b/plat/allwinner/sun50i_a64/include/sunxi_mmap.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -14,8 +14,8 @@
#define SUNXI_SRAM_SIZE 0x00044000
#define SUNXI_SRAM_A1_BASE 0x00010000
#define SUNXI_SRAM_A1_SIZE 0x00008000
-#define SUNXI_SRAM_A2_BASE 0x00044000
-#define SUNXI_SRAM_A2_SIZE 0x00010000
+#define SUNXI_SRAM_A2_BASE 0x00040000
+#define SUNXI_SRAM_A2_SIZE 0x00014000
#define SUNXI_SRAM_C_BASE 0x00018000
#define SUNXI_SRAM_C_SIZE 0x0001c000
#define SUNXI_DEV_BASE 0x01000000
diff --git a/plat/allwinner/sun50i_h6/include/sunxi_mmap.h b/plat/allwinner/sun50i_h6/include/sunxi_mmap.h
index f36491a..0e204d0 100644
--- a/plat/allwinner/sun50i_h6/include/sunxi_mmap.h
+++ b/plat/allwinner/sun50i_h6/include/sunxi_mmap.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -14,8 +14,8 @@
#define SUNXI_SRAM_SIZE 0x000f8000
#define SUNXI_SRAM_A1_BASE 0x00020000
#define SUNXI_SRAM_A1_SIZE 0x00008000
-#define SUNXI_SRAM_A2_BASE 0x00104000
-#define SUNXI_SRAM_A2_SIZE 0x00014000
+#define SUNXI_SRAM_A2_BASE 0x00100000
+#define SUNXI_SRAM_A2_SIZE 0x00018000
#define SUNXI_SRAM_C_BASE 0x00028000
#define SUNXI_SRAM_C_SIZE 0x0001e000
#define SUNXI_DEV_BASE 0x01000000
diff --git a/plat/amlogic/common/aml_console.c b/plat/amlogic/common/aml_console.c
index 352279b..e21d707 100644
--- a/plat/amlogic/common/aml_console.c
+++ b/plat/amlogic/common/aml_console.c
@@ -11,7 +11,7 @@
/*******************************************************************************
* Function that sets up the console
******************************************************************************/
-static console_meson_t aml_console;
+static console_t aml_console;
void aml_console_init(void)
{
@@ -28,6 +28,6 @@
panic();
}
- console_set_scope(&aml_console.console,
+ console_set_scope(&aml_console,
CONSOLE_FLAG_BOOT | CONSOLE_FLAG_RUNTIME);
}
diff --git a/plat/arm/board/fvp/fvp_def.h b/plat/arm/board/fvp/fvp_def.h
index 347ba2e..909b687 100644
--- a/plat/arm/board/fvp/fvp_def.h
+++ b/plat/arm/board/fvp/fvp_def.h
@@ -52,8 +52,10 @@
#define DEVICE1_BASE UL(0x2e000000)
#define DEVICE1_SIZE UL(0x1A00000)
#else
-#define DEVICE1_BASE UL(0x2f000000)
-#define DEVICE1_SIZE UL(0x200000)
+/* GICv2 and GICv3 mapping: GICD + CORE_COUNT * 128KB */
+#define DEVICE1_BASE BASE_GICD_BASE
+#define DEVICE1_SIZE ((BASE_GICR_BASE - BASE_GICD_BASE) + \
+ (PLATFORM_CORE_COUNT * 0x20000))
#define NSRAM_BASE UL(0x2e000000)
#define NSRAM_SIZE UL(0x10000)
#endif
@@ -110,7 +112,7 @@
#define FVP_SP810_CTRL_TIM3_OV BIT_32(22)
/*******************************************************************************
- * GIC-400 & interrupt handling related constants
+ * GIC & interrupt handling related constants
******************************************************************************/
/* VE compatible GIC memory map */
#define VE_GICD_BASE UL(0x2c001000)
@@ -128,7 +130,6 @@
#define FVP_IRQ_TZ_WDOG 56
#define FVP_IRQ_SEC_SYS_TIMER 57
-
/*******************************************************************************
* TrustZone address space controller related constants
******************************************************************************/
diff --git a/plat/arm/board/fvp/platform.mk b/plat/arm/board/fvp/platform.mk
index 4176968..05c11ce 100644
--- a/plat/arm/board/fvp/platform.mk
+++ b/plat/arm/board/fvp/platform.mk
@@ -292,7 +292,7 @@
ifeq (${RESET_TO_SP_MIN},1)
BL32_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
endif
-else # if AArch64
+else # AArch64
ifeq (${RESET_TO_BL31},1)
BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
endif
@@ -301,6 +301,17 @@
endif
endif
+ifeq (${ALLOW_RO_XLAT_TABLES}, 1)
+ ifeq (${ARCH},aarch32)
+ BL32_CFLAGS += -DPLAT_RO_XLAT_TABLES=1
+ else # AArch64
+ BL31_CFLAGS += -DPLAT_RO_XLAT_TABLES=1
+ ifeq (${SPD},tspd)
+ BL32_CFLAGS += -DPLAT_RO_XLAT_TABLES=1
+ endif
+ endif
+endif
+
ifeq (${USE_DEBUGFS},1)
BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
endif
diff --git a/plat/arm/board/juno/platform.mk b/plat/arm/board/juno/platform.mk
index 27650d2..f07c1b1 100644
--- a/plat/arm/board/juno/platform.mk
+++ b/plat/arm/board/juno/platform.mk
@@ -155,6 +155,14 @@
endif
endif
+ifeq (${ALLOW_RO_XLAT_TABLES}, 1)
+ ifeq (${JUNO_AARCH32_EL3_RUNTIME}, 1)
+ BL32_CFLAGS += -DPLAT_RO_XLAT_TABLES=1
+ else
+ BL31_CFLAGS += -DPLAT_RO_XLAT_TABLES=1
+ endif
+endif
+
# Add the FDT_SOURCES and options for Dynamic Config
FDT_SOURCES += plat/arm/board/juno/fdts/${PLAT}_fw_config.dts
TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
diff --git a/plat/arm/common/arm_bl31_setup.c b/plat/arm/common/arm_bl31_setup.c
index c135d7f..85535c1 100644
--- a/plat/arm/common/arm_bl31_setup.c
+++ b/plat/arm/common/arm_bl31_setup.c
@@ -256,9 +256,14 @@
/* Initialize the runtime console */
arm_console_runtime_init();
+
#if RECLAIM_INIT_CODE
arm_free_init_memory();
#endif
+
+#if PLAT_RO_XLAT_TABLES
+ arm_xlat_make_tables_readonly();
+#endif
}
#if RECLAIM_INIT_CODE
diff --git a/plat/arm/common/arm_common.c b/plat/arm/common/arm_common.c
index d1e9620..d1eee08 100644
--- a/plat/arm/common/arm_common.c
+++ b/plat/arm/common/arm_common.c
@@ -25,6 +25,26 @@
* conflicts with the definition in plat/common. */
#pragma weak plat_get_syscnt_freq2
+/*******************************************************************************
+ * Changes the memory attributes for the region of mapped memory where the BL
+ * image's translation tables are located such that the tables will have
+ * read-only permissions.
+ ******************************************************************************/
+#if PLAT_RO_XLAT_TABLES
+void arm_xlat_make_tables_readonly(void)
+{
+ int rc = xlat_make_tables_readonly();
+
+ if (rc != 0) {
+ ERROR("Failed to make translation tables read-only at EL%u.\n",
+ get_current_el());
+ panic();
+ }
+
+ INFO("Translation tables are now read-only at EL%u.\n",
+ get_current_el());
+}
+#endif
void arm_setup_romlib(void)
{
diff --git a/plat/arm/common/arm_console.c b/plat/arm/common/arm_console.c
index 123811d..0cac5d9 100644
--- a/plat/arm/common/arm_console.c
+++ b/plat/arm/common/arm_console.c
@@ -16,8 +16,8 @@
/*******************************************************************************
* Functions that set up the console
******************************************************************************/
-static console_pl011_t arm_boot_console;
-static console_pl011_t arm_runtime_console;
+static console_t arm_boot_console;
+static console_t arm_runtime_console;
/* Initialize the console to provide early debug support */
void __init arm_console_boot_init(void)
@@ -35,13 +35,13 @@
panic();
}
- console_set_scope(&arm_boot_console.console, CONSOLE_FLAG_BOOT);
+ console_set_scope(&arm_boot_console, CONSOLE_FLAG_BOOT);
}
void arm_console_boot_end(void)
{
(void)console_flush();
- (void)console_unregister(&arm_boot_console.console);
+ (void)console_unregister(&arm_boot_console);
}
/* Initialize the runtime console */
@@ -54,7 +54,7 @@
if (rc == 0)
panic();
- console_set_scope(&arm_runtime_console.console, CONSOLE_FLAG_RUNTIME);
+ console_set_scope(&arm_runtime_console, CONSOLE_FLAG_RUNTIME);
}
void arm_console_runtime_end(void)
diff --git a/plat/arm/common/arm_dyn_cfg.c b/plat/arm/common/arm_dyn_cfg.c
index 443d40f..df75307 100644
--- a/plat/arm/common/arm_dyn_cfg.c
+++ b/plat/arm/common/arm_dyn_cfg.c
@@ -21,7 +21,6 @@
#include <lib/fconf/fconf_tbbr_getter.h>
#include <plat/arm/common/arm_dyn_cfg_helpers.h>
#include <plat/arm/common/plat_arm.h>
-#include <plat/common/platform.h>
#if TRUSTED_BOARD_BOOT
diff --git a/plat/arm/common/arm_fconf_io_storage.c b/plat/arm/common/arm_fconf_io_storage.c
index 341622a..6fcfbd6 100644
--- a/plat/arm/common/arm_fconf_io_storage.c
+++ b/plat/arm/common/arm_fconf_io_storage.c
@@ -12,7 +12,6 @@
#include <drivers/io/io_memmap.h>
#include <drivers/io/io_storage.h>
#include <lib/utils.h>
-#include <tools_share/firmware_image_package.h>
#include <plat/arm/common/arm_fconf_getter.h>
#include <plat/arm/common/arm_fconf_io_storage.h>
diff --git a/plat/arm/common/fconf/arm_fconf_io.c b/plat/arm/common/fconf/arm_fconf_io.c
index 3c0586f..cfcddc2 100644
--- a/plat/arm/common/fconf/arm_fconf_io.c
+++ b/plat/arm/common/fconf/arm_fconf_io.c
@@ -59,9 +59,9 @@
#ifdef IMAGE_BL2
#if TRUSTED_BOARD_BOOT
-#define FCONF_ARM_IO_UUID_NUMBER 19
+#define FCONF_ARM_IO_UUID_NUMBER U(19)
#else
-#define FCONF_ARM_IO_UUID_NUMBER 10
+#define FCONF_ARM_IO_UUID_NUMBER U(10)
#endif
static io_uuid_spec_t fconf_arm_uuids[FCONF_ARM_IO_UUID_NUMBER];
diff --git a/plat/arm/common/sp_min/arm_sp_min_setup.c b/plat/arm/common/sp_min/arm_sp_min_setup.c
index 0cc746b..cbbdfa2 100644
--- a/plat/arm/common/sp_min/arm_sp_min_setup.c
+++ b/plat/arm/common/sp_min/arm_sp_min_setup.c
@@ -167,6 +167,10 @@
{
/* Initialize the runtime console */
arm_console_runtime_init();
+
+#if PLAT_RO_XLAT_TABLES
+ arm_xlat_make_tables_readonly();
+#endif
}
/*******************************************************************************
diff --git a/plat/arm/common/tsp/arm_tsp_setup.c b/plat/arm/common/tsp/arm_tsp_setup.c
index aefdf89..a4da8c3 100644
--- a/plat/arm/common/tsp/arm_tsp_setup.c
+++ b/plat/arm/common/tsp/arm_tsp_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -28,7 +28,7 @@
/*******************************************************************************
* Initialize the UART
******************************************************************************/
-static console_pl011_t arm_tsp_runtime_console;
+static console_t arm_tsp_runtime_console;
void arm_tsp_early_platform_setup(void)
{
@@ -43,7 +43,7 @@
if (rc == 0)
panic();
- console_set_scope(&arm_tsp_runtime_console.console,
+ console_set_scope(&arm_tsp_runtime_console,
CONSOLE_FLAG_BOOT | CONSOLE_FLAG_RUNTIME);
}
@@ -79,4 +79,8 @@
setup_page_tables(bl_regions, plat_arm_get_mmap());
enable_mmu_el1(0);
+
+#if PLAT_RO_XLAT_TABLES
+ arm_xlat_make_tables_readonly();
+#endif
}
diff --git a/plat/hisilicon/hikey/hikey_bl1_setup.c b/plat/hisilicon/hikey/hikey_bl1_setup.c
index a97d763..86e4fd6 100644
--- a/plat/hisilicon/hikey/hikey_bl1_setup.c
+++ b/plat/hisilicon/hikey/hikey_bl1_setup.c
@@ -26,7 +26,7 @@
/* Data structure which holds the extents of the trusted RAM for BL1 */
static meminfo_t bl1_tzram_layout;
-static console_pl011_t console;
+static console_t console;
enum {
BOOT_NORMAL = 0,
diff --git a/plat/hisilicon/hikey/hikey_bl2_setup.c b/plat/hisilicon/hikey/hikey_bl2_setup.c
index 96136ec..feb7f8a 100644
--- a/plat/hisilicon/hikey/hikey_bl2_setup.c
+++ b/plat/hisilicon/hikey/hikey_bl2_setup.c
@@ -32,7 +32,7 @@
#define BL2_RW_BASE (BL_CODE_END)
static meminfo_t bl2_el3_tzram_layout;
-static console_pl011_t console;
+static console_t console;
enum {
BOOT_MODE_RECOVERY = 0,
diff --git a/plat/hisilicon/hikey/hikey_bl31_setup.c b/plat/hisilicon/hikey/hikey_bl31_setup.c
index 0326e9f..7d008e7 100644
--- a/plat/hisilicon/hikey/hikey_bl31_setup.c
+++ b/plat/hisilicon/hikey/hikey_bl31_setup.c
@@ -27,7 +27,7 @@
static entry_point_info_t bl32_ep_info;
static entry_point_info_t bl33_ep_info;
-static console_pl011_t console;
+static console_t console;
/******************************************************************************
* On a GICv2 system, the Group 1 secure interrupts are treated as Group 0
diff --git a/plat/hisilicon/hikey960/hikey960_bl1_setup.c b/plat/hisilicon/hikey960/hikey960_bl1_setup.c
index 4a7036c..0a2d062 100644
--- a/plat/hisilicon/hikey960/hikey960_bl1_setup.c
+++ b/plat/hisilicon/hikey960/hikey960_bl1_setup.c
@@ -41,7 +41,7 @@
/* Data structure which holds the extents of the trusted RAM for BL1 */
static meminfo_t bl1_tzram_layout;
-static console_pl011_t console;
+static console_t console;
/******************************************************************************
* On a GICv2 system, the Group 1 secure interrupts are treated as Group 0
diff --git a/plat/hisilicon/hikey960/hikey960_bl2_setup.c b/plat/hisilicon/hikey960/hikey960_bl2_setup.c
index 35d7692..c1c2a8c 100644
--- a/plat/hisilicon/hikey960/hikey960_bl2_setup.c
+++ b/plat/hisilicon/hikey960/hikey960_bl2_setup.c
@@ -32,7 +32,7 @@
#define BL2_RW_BASE (BL_CODE_END)
static meminfo_t bl2_el3_tzram_layout;
-static console_pl011_t console;
+static console_t console;
extern int load_lpm3(void);
enum {
diff --git a/plat/hisilicon/hikey960/hikey960_bl31_setup.c b/plat/hisilicon/hikey960/hikey960_bl31_setup.c
index 9383265..d3b4e4f 100644
--- a/plat/hisilicon/hikey960/hikey960_bl31_setup.c
+++ b/plat/hisilicon/hikey960/hikey960_bl31_setup.c
@@ -29,7 +29,7 @@
static entry_point_info_t bl32_ep_info;
static entry_point_info_t bl33_ep_info;
-static console_pl011_t console;
+static console_t console;
/******************************************************************************
* On a GICv2 system, the Group 1 secure interrupts are treated as Group 0
diff --git a/plat/hisilicon/hikey960/hikey960_pm.c b/plat/hisilicon/hikey960/hikey960_pm.c
index ede893e..9f96fc3 100644
--- a/plat/hisilicon/hikey960/hikey960_pm.c
+++ b/plat/hisilicon/hikey960/hikey960_pm.c
@@ -33,7 +33,7 @@
#define AXI_CONF_BASE 0x820
static unsigned int uart_base;
-static console_pl011_t console;
+static console_t console;
static uintptr_t hikey960_sec_entrypoint;
static void hikey960_pwr_domain_standby(plat_local_state_t cpu_state)
diff --git a/plat/hisilicon/poplar/bl1_plat_setup.c b/plat/hisilicon/poplar/bl1_plat_setup.c
index 08ad67c..047ba62 100644
--- a/plat/hisilicon/poplar/bl1_plat_setup.c
+++ b/plat/hisilicon/poplar/bl1_plat_setup.c
@@ -28,7 +28,7 @@
/* Data structure which holds the extents of the trusted RAM for BL1 */
static meminfo_t bl1_tzram_layout;
static meminfo_t bl2_tzram_layout;
-static console_pl011_t console;
+static console_t console;
/*
* Cannot use default weak implementation in bl1_main.c because BL1 RW data is
diff --git a/plat/hisilicon/poplar/bl2_plat_setup.c b/plat/hisilicon/poplar/bl2_plat_setup.c
index cc9d975..482935c 100644
--- a/plat/hisilicon/poplar/bl2_plat_setup.c
+++ b/plat/hisilicon/poplar/bl2_plat_setup.c
@@ -25,7 +25,7 @@
#include "plat_private.h"
static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
-static console_pl011_t console;
+static console_t console;
/*******************************************************************************
* Transfer SCP_BL2 from Trusted RAM using the SCP Download protocol.
diff --git a/plat/hisilicon/poplar/bl31_plat_setup.c b/plat/hisilicon/poplar/bl31_plat_setup.c
index 981ef37..a4e17ca 100644
--- a/plat/hisilicon/poplar/bl31_plat_setup.c
+++ b/plat/hisilicon/poplar/bl31_plat_setup.c
@@ -29,7 +29,7 @@
static entry_point_info_t bl32_image_ep_info;
static entry_point_info_t bl33_image_ep_info;
-static console_pl011_t console;
+static console_t console;
static void hisi_tzpc_sec_init(void)
{
diff --git a/plat/imx/common/include/imx8_lpuart.h b/plat/imx/common/include/imx8_lpuart.h
index 0ea284f..26470e0 100644
--- a/plat/imx/common/include/imx8_lpuart.h
+++ b/plat/imx/common/include/imx8_lpuart.h
@@ -54,13 +54,8 @@
#include <stdint.h>
-typedef struct {
- console_t console;
- uintptr_t base;
-} console_lpuart_t;
-
int console_lpuart_register(uintptr_t baseaddr, uint32_t clock, uint32_t baud,
- console_lpuart_t *console);
+ console_t *console);
#endif /*__ASSEMBLER__*/
#endif /* IMX8_LPUART_H */
diff --git a/plat/imx/common/include/imx_uart.h b/plat/imx/common/include/imx_uart.h
index cc1b531..6c4d62f 100644
--- a/plat/imx/common/include/imx_uart.h
+++ b/plat/imx/common/include/imx_uart.h
@@ -11,13 +11,8 @@
#ifndef __ASSEMBLER__
-typedef struct {
- console_t console;
- uintptr_t base;
-} console_uart_t;
-
int console_imx_uart_register(uintptr_t baseaddr, uint32_t clock, uint32_t baud,
- console_uart_t *console);
+ console_t *console);
#endif /*__ASSEMBLER__*/
#endif /* IMX_UART_H */
diff --git a/plat/imx/imx7/common/imx7_bl2_el3_common.c b/plat/imx/imx7/common/imx7_bl2_el3_common.c
index a1e2aaf..7f156e3 100644
--- a/plat/imx/imx7/common/imx7_bl2_el3_common.c
+++ b/plat/imx/imx7/common/imx7_bl2_el3_common.c
@@ -150,7 +150,7 @@
void bl2_el3_early_platform_setup(u_register_t arg1, u_register_t arg2,
u_register_t arg3, u_register_t arg4)
{
- static console_imx_uart_t console;
+ static console_t console;
int console_scope = CONSOLE_FLAG_BOOT | CONSOLE_FLAG_RUNTIME;
/* Initialize common components */
@@ -170,7 +170,7 @@
PLAT_IMX7_BOOT_UART_CLK_IN_HZ,
PLAT_IMX7_CONSOLE_BAUDRATE,
&console);
- console_set_scope(&console.console, console_scope);
+ console_set_scope(&console, console_scope);
/* Open handles to persistent storage */
plat_imx7_io_setup();
diff --git a/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c b/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c
index 4c5f4f0..40110d7 100644
--- a/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c
+++ b/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c
@@ -97,7 +97,7 @@
void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3)
{
- static console_uart_t console;
+ static console_t console;
int i;
/* Enable CSU NS access permission */
@@ -114,7 +114,7 @@
console_imx_uart_register(IMX_BOOT_UART_BASE, IMX_BOOT_UART_CLK_IN_HZ,
IMX_CONSOLE_BAUDRATE, &console);
/* This console is only used for boot stage */
- console_set_scope(&console.console, CONSOLE_FLAG_BOOT);
+ console_set_scope(&console, CONSOLE_FLAG_BOOT);
/*
* tell BL3-1 where the non-secure software image is located
diff --git a/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c b/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c
index a347389..05b5970 100644
--- a/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c
+++ b/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c
@@ -133,7 +133,7 @@
imx8m_caam_init();
#if DEBUG_CONSOLE
- static console_uart_t console;
+ static console_t console;
console_imx_uart_register(IMX_BOOT_UART_BASE, IMX_BOOT_UART_CLK_IN_HZ,
IMX_CONSOLE_BAUDRATE, &console);
diff --git a/plat/imx/imx8m/include/imx_rdc.h b/plat/imx/imx8m/include/imx_rdc.h
index 6be8550..e25b0e6 100644
--- a/plat/imx/imx8m/include/imx_rdc.h
+++ b/plat/imx/imx8m/include/imx_rdc.h
@@ -13,9 +13,9 @@
#define MDAn(x) (IMX_RDC_BASE + 0x200 + (x) * 4)
#define PDAPn(x) (IMX_RDC_BASE + 0x400 + (x) * 4)
-#define MRSAn(x) (IMX_RDC_BASE + 0x800 + (x) * 4)
-#define MREAn(x) (IMX_RDC_BASE + 0x804 + (x) * 4)
-#define MRCn(x) (IMX_RDC_BASE + 0x808 + (x) * 4)
+#define MRSAn(x) (IMX_RDC_BASE + 0x800 + (x) * 0x10)
+#define MREAn(x) (IMX_RDC_BASE + 0x804 + (x) * 0x10)
+#define MRCn(x) (IMX_RDC_BASE + 0x808 + (x) * 0x10)
#define LCK BIT(31)
#define SREQ BIT(30)
diff --git a/plat/imx/imx8qm/imx8qm_bl31_setup.c b/plat/imx/imx8qm/imx8qm_bl31_setup.c
index 9232cbc..cffb140 100644
--- a/plat/imx/imx8qm/imx8qm_bl31_setup.c
+++ b/plat/imx/imx8qm/imx8qm_bl31_setup.c
@@ -295,7 +295,7 @@
u_register_t arg2, u_register_t arg3)
{
#if DEBUG_CONSOLE
- static console_lpuart_t console;
+ static console_t console;
#endif
if (sc_ipc_open(&ipc_handle, SC_IPC_BASE) != SC_ERR_NONE)
panic();
diff --git a/plat/imx/imx8qx/imx8qx_bl31_setup.c b/plat/imx/imx8qx/imx8qx_bl31_setup.c
index 58c82ce..97d2227 100644
--- a/plat/imx/imx8qx/imx8qx_bl31_setup.c
+++ b/plat/imx/imx8qx/imx8qx_bl31_setup.c
@@ -255,7 +255,7 @@
u_register_t arg2, u_register_t arg3)
{
#if DEBUG_CONSOLE
- static console_lpuart_t console;
+ static console_t console;
#endif
if (sc_ipc_open(&ipc_handle, SC_IPC_BASE) != SC_ERR_NONE)
panic();
diff --git a/plat/intel/soc/agilex/bl2_plat_setup.c b/plat/intel/soc/agilex/bl2_plat_setup.c
index f328207..468b356 100644
--- a/plat/intel/soc/agilex/bl2_plat_setup.c
+++ b/plat/intel/soc/agilex/bl2_plat_setup.c
@@ -51,7 +51,7 @@
void bl2_el3_early_platform_setup(u_register_t x0, u_register_t x1,
u_register_t x2, u_register_t x4)
{
- static console_16550_t console;
+ static console_t console;
handoff reverse_handoff_ptr;
generic_delay_timer_init();
diff --git a/plat/intel/soc/agilex/bl31_plat_setup.c b/plat/intel/soc/agilex/bl31_plat_setup.c
index 4b11440..6f32aff 100644
--- a/plat/intel/soc/agilex/bl31_plat_setup.c
+++ b/plat/intel/soc/agilex/bl31_plat_setup.c
@@ -37,7 +37,7 @@
void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3)
{
- static console_16550_t console;
+ static console_t console;
console_16550_register(PLAT_UART0_BASE, PLAT_UART_CLOCK, PLAT_BAUDRATE,
&console);
diff --git a/plat/intel/soc/common/include/socfpga_sip_svc.h b/plat/intel/soc/common/include/socfpga_sip_svc.h
index 2b1d983..19a52f7 100644
--- a/plat/intel/soc/common/include/socfpga_sip_svc.h
+++ b/plat/intel/soc/common/include/socfpga_sip_svc.h
@@ -10,9 +10,11 @@
/* SiP status response */
#define INTEL_SIP_SMC_STATUS_OK 0
-#define INTEL_SIP_SMC_STATUS_ERROR 0x4
#define INTEL_SIP_SMC_STATUS_BUSY 0x1
#define INTEL_SIP_SMC_STATUS_REJECTED 0x2
+#define INTEL_SIP_SMC_STATUS_ERROR 0x4
+#define INTEL_SIP_SMC_RSU_ERROR 0x7
+
/* SMC SiP service function identifier */
#define INTEL_SIP_SMC_FPGA_CONFIG_START 0xC2000001
diff --git a/plat/intel/soc/common/socfpga_sip_svc.c b/plat/intel/soc/common/socfpga_sip_svc.c
index c1052ad..a20baab 100644
--- a/plat/intel/soc/common/socfpga_sip_svc.c
+++ b/plat/intel/soc/common/socfpga_sip_svc.c
@@ -374,7 +374,7 @@
static uint32_t intel_rsu_status(uint64_t *respbuf, uint32_t respbuf_sz)
{
if (mailbox_rsu_status((uint32_t *)respbuf, respbuf_sz) < 0)
- return INTEL_SIP_SMC_STATUS_ERROR;
+ return INTEL_SIP_SMC_RSU_ERROR;
return INTEL_SIP_SMC_STATUS_OK;
}
@@ -388,7 +388,7 @@
static uint32_t intel_rsu_notify(uint32_t execution_stage)
{
if (mailbox_hps_stage_notify(execution_stage) < 0)
- return INTEL_SIP_SMC_STATUS_ERROR;
+ return INTEL_SIP_SMC_RSU_ERROR;
return INTEL_SIP_SMC_STATUS_OK;
}
@@ -397,7 +397,7 @@
uint32_t *ret_stat)
{
if (mailbox_rsu_status((uint32_t *)respbuf, respbuf_sz) < 0)
- return INTEL_SIP_SMC_STATUS_ERROR;
+ return INTEL_SIP_SMC_RSU_ERROR;
*ret_stat = respbuf[8];
return INTEL_SIP_SMC_STATUS_OK;
diff --git a/plat/intel/soc/stratix10/bl2_plat_setup.c b/plat/intel/soc/stratix10/bl2_plat_setup.c
index 78ca253..d0c8e4c 100644
--- a/plat/intel/soc/stratix10/bl2_plat_setup.c
+++ b/plat/intel/soc/stratix10/bl2_plat_setup.c
@@ -50,7 +50,7 @@
void bl2_el3_early_platform_setup(u_register_t x0, u_register_t x1,
u_register_t x2, u_register_t x4)
{
- static console_16550_t console;
+ static console_t console;
handoff reverse_handoff_ptr;
generic_delay_timer_init();
diff --git a/plat/intel/soc/stratix10/bl31_plat_setup.c b/plat/intel/soc/stratix10/bl31_plat_setup.c
index 4c31238..5813c8f 100644
--- a/plat/intel/soc/stratix10/bl31_plat_setup.c
+++ b/plat/intel/soc/stratix10/bl31_plat_setup.c
@@ -45,7 +45,7 @@
void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3)
{
- static console_16550_t console;
+ static console_t console;
console_16550_register(PLAT_UART0_BASE, PLAT_UART_CLOCK, PLAT_BAUDRATE,
&console);
diff --git a/plat/layerscape/common/aarch64/ls_console.S b/plat/layerscape/common/aarch64/ls_console.S
index f8948b4..c1bd3f7 100644
--- a/plat/layerscape/common/aarch64/ls_console.S
+++ b/plat/layerscape/common/aarch64/ls_console.S
@@ -81,7 +81,7 @@
.globl console_ls_16550_register
/* -----------------------------------------------
- * int console_ls_16550_register(console_ls_16550_t *console,
+ * int console_ls_16550_register(console_t *console,
* uintptr_t base, uint32_t clk, uint32_t baud)
* Function to initialize and register a new 16550
* console. Storage passed in for the console struct
@@ -89,7 +89,7 @@
* In: x0 - UART register base address
* w1 - UART clock in Hz
* w2 - Baud rate
- * x3 - pointer to empty console_ls_16550_t struct
+ * x3 - pointer to empty console_t struct
* Out: return 1 on success, 0 on error
* Clobber list : x0, x1, x2, x6, x7, x14
* -----------------------------------------------
@@ -98,7 +98,7 @@
mov x7, x30
mov x6, x3
cbz x6, register_fail
- str x0, [x6, #CONSOLE_T_16550_BASE]
+ str x0, [x6, #CONSOLE_T_BASE]
bl console_ls_16550_core_init
cbz x0, register_fail
@@ -150,7 +150,7 @@
endfunc console_ls_16550_core_putc
/* --------------------------------------------------------
- * int console_16550_putc(int c, console_ls_16550_t *console)
+ * int console_16550_putc(int c, console_t *console)
* Function to output a character over the console. It
* returns the character printed on success or -1 on error.
* In : w0 - character to be printed
@@ -164,7 +164,7 @@
cmp x1, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr x1, [x1, #CONSOLE_T_16550_BASE]
+ ldr x1, [x1, #CONSOLE_T_BASE]
b console_ls_16550_core_putc
endfunc console_ls_16550_putc
@@ -195,7 +195,7 @@
endfunc console_ls_16550_core_getc
/* ---------------------------------------------
- * int console_ls_16550_getc(console_ls_16550_t *console)
+ * int console_ls_16550_getc(console_t *console)
* Function to get a character from the console.
* It returns the character grabbed on success
* or -1 on if no character is available.
@@ -209,7 +209,7 @@
cmp x1, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr x0, [x0, #CONSOLE_T_16550_BASE]
+ ldr x0, [x0, #CONSOLE_T_BASE]
b console_ls_16550_core_getc
endfunc console_ls_16550_getc
@@ -239,7 +239,7 @@
endfunc console_ls_16550_core_flush
/* ---------------------------------------------
- * int console_ls_16550_flush(console_ls_16550_t *console)
+ * int console_ls_16550_flush(console_t *console)
* Function to force a write of all buffered
* data that hasn't been output.
* In : x0 - pointer to console_t structure
@@ -252,6 +252,6 @@
cmp x0, #0
ASM_ASSERT(ne)
#endif /* ENABLE_ASSERTIONS */
- ldr x0, [x0, #CONSOLE_T_16550_BASE]
+ ldr x0, [x0, #CONSOLE_T_BASE]
b console_ls_16550_core_flush
endfunc console_ls_16550_flush
diff --git a/plat/layerscape/common/include/ls_16550.h b/plat/layerscape/common/include/ls_16550.h
index cb4514f..95a64ad 100644
--- a/plat/layerscape/common/include/ls_16550.h
+++ b/plat/layerscape/common/include/ls_16550.h
@@ -61,17 +61,10 @@
#define UARTLSR_OVRF (1 << 2) /* Rx Overrun Error */
#define UARTLSR_RDR (1 << 2) /* Rx Data Ready */
-#define CONSOLE_T_16550_BASE CONSOLE_T_DRVDATA
-
#ifndef __ASSEMBLER__
#include <stdint.h>
-typedef struct {
- console_t console;
- uintptr_t base;
-} console_ls_16550_t;
-
/*
* Initialize a new 16550 console instance and register it with the console
* framework. The |console| pointer must point to storage that will be valid
@@ -79,7 +72,7 @@
* Its contents will be reinitialized from scratch.
*/
int console_ls_16550_register(uintptr_t baseaddr, uint32_t clock, uint32_t baud,
- console_ls_16550_t *console);
+ console_t *console);
#endif /*__ASSEMBLER__*/
diff --git a/plat/layerscape/common/ls_bl1_setup.c b/plat/layerscape/common/ls_bl1_setup.c
index fff065e..fa69be2 100644
--- a/plat/layerscape/common/ls_bl1_setup.c
+++ b/plat/layerscape/common/ls_bl1_setup.c
@@ -23,7 +23,7 @@
******************************************************************************/
void ls_bl1_early_platform_setup(void)
{
- static console_ls_16550_t console;
+ static console_t console;
#if !LS1043_DISABLE_TRUSTED_WDOG
/* TODO: Enable watchdog */
diff --git a/plat/layerscape/common/ls_bl2_setup.c b/plat/layerscape/common/ls_bl2_setup.c
index 35f42e1..6ca66bd 100644
--- a/plat/layerscape/common/ls_bl2_setup.c
+++ b/plat/layerscape/common/ls_bl2_setup.c
@@ -23,7 +23,7 @@
******************************************************************************/
void ls_bl2_early_platform_setup(meminfo_t *mem_layout)
{
- static console_ls_16550_t console;
+ static console_t console;
/* Initialize the console to provide early debug support */
console_ls_16550_register(LS_TF_UART_BASE, LS_TF_UART_CLOCK,
diff --git a/plat/layerscape/common/ls_bl31_setup.c b/plat/layerscape/common/ls_bl31_setup.c
index 03e5807..7a91aef 100644
--- a/plat/layerscape/common/ls_bl31_setup.c
+++ b/plat/layerscape/common/ls_bl31_setup.c
@@ -67,7 +67,7 @@
void ls_bl31_early_platform_setup(void *from_bl2,
void *plat_params_from_bl2)
{
- static console_ls_16550_t console;
+ static console_t console;
/* Initialize the console to provide early debug support */
console_ls_16550_register(LS_TF_UART_BASE, LS_TF_UART_CLOCK,
@@ -182,7 +182,7 @@
******************************************************************************/
void ls_bl31_plat_runtime_setup(void)
{
- static console_ls_16550_t console;
+ static console_t console;
/* Initialize the runtime console */
console_ls_16550_register(PLAT_LS1043_UART_BASE, PLAT_LS1043_UART_CLOCK,
diff --git a/plat/layerscape/common/tsp/ls_tsp_setup.c b/plat/layerscape/common/tsp/ls_tsp_setup.c
index f3b6027..969d0b8 100644
--- a/plat/layerscape/common/tsp/ls_tsp_setup.c
+++ b/plat/layerscape/common/tsp/ls_tsp_setup.c
@@ -30,7 +30,7 @@
******************************************************************************/
void ls_tsp_early_platform_setup(void)
{
- static console_ls_16550_t console;
+ static console_t console;
/*
* Initialize a different console than already in use to display
* messages from TSP
diff --git a/plat/marvell/common/marvell_console.c b/plat/marvell/common/marvell_console.c
index 22c5eb3..1716661 100644
--- a/plat/marvell/common/marvell_console.c
+++ b/plat/marvell/common/marvell_console.c
@@ -14,16 +14,15 @@
#ifdef PLAT_a3700
#include <drivers/marvell/uart/a3700_console.h>
-
-static console_a3700_t marvell_boot_console;
-static console_a3700_t marvell_runtime_console;
+#define console_marvell_register console_a3700_register
#else
#include <drivers/ti/uart/uart_16550.h>
-
-static console_16550_t marvell_boot_console;
-static console_16550_t marvell_runtime_console;
+#define console_marvell_register console_16550_register
#endif
+static console_t marvell_boot_console;
+static console_t marvell_runtime_console;
+
/*******************************************************************************
* Functions that set up the console
******************************************************************************/
@@ -32,15 +31,10 @@
void marvell_console_boot_init(void)
{
int rc =
-#ifdef PLAT_a3700
- console_a3700_register(
-#else
- console_16550_register(
-#endif
- PLAT_MARVELL_BOOT_UART_BASE,
- PLAT_MARVELL_BOOT_UART_CLK_IN_HZ,
- MARVELL_CONSOLE_BAUDRATE,
- &marvell_boot_console);
+ console_marvell_register(PLAT_MARVELL_BOOT_UART_BASE,
+ PLAT_MARVELL_BOOT_UART_CLK_IN_HZ,
+ MARVELL_CONSOLE_BAUDRATE,
+ &marvell_boot_console);
if (rc == 0) {
/*
* The crash console doesn't use the multi console API, it uses
@@ -50,40 +44,33 @@
panic();
}
- console_set_scope(&marvell_boot_console.console,
- CONSOLE_FLAG_BOOT);
+ console_set_scope(&marvell_boot_console, CONSOLE_FLAG_BOOT);
}
void marvell_console_boot_end(void)
{
(void)console_flush();
- (void)console_unregister(&marvell_boot_console.console);
+ (void)console_unregister(&marvell_boot_console);
}
/* Initialize the runtime console */
void marvell_console_runtime_init(void)
{
int rc =
-#ifdef PLAT_a3700
- console_a3700_register(
-#else
- console_16550_register(
-#endif
- PLAT_MARVELL_BOOT_UART_BASE,
- PLAT_MARVELL_BOOT_UART_CLK_IN_HZ,
- MARVELL_CONSOLE_BAUDRATE,
- &marvell_runtime_console);
+ console_marvell_register(PLAT_MARVELL_BOOT_UART_BASE,
+ PLAT_MARVELL_BOOT_UART_CLK_IN_HZ,
+ MARVELL_CONSOLE_BAUDRATE,
+ &marvell_runtime_console);
if (rc == 0)
panic();
- console_set_scope(&marvell_runtime_console.console,
- CONSOLE_FLAG_RUNTIME);
+ console_set_scope(&marvell_runtime_console, CONSOLE_FLAG_RUNTIME);
}
void marvell_console_runtime_end(void)
{
(void)console_flush();
- (void)console_unregister(&marvell_runtime_console.console);
+ (void)console_unregister(&marvell_runtime_console);
}
diff --git a/plat/mediatek/mt8173/bl31_plat_setup.c b/plat/mediatek/mt8173/bl31_plat_setup.c
index 73a479b..bd7d0b0 100644
--- a/plat/mediatek/mt8173/bl31_plat_setup.c
+++ b/plat/mediatek/mt8173/bl31_plat_setup.c
@@ -100,7 +100,7 @@
void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3)
{
- static console_16550_t console;
+ static console_t console;
console_16550_register(MT8173_UART0_BASE, MT8173_UART_CLOCK, MT8173_BAUDRATE, &console);
diff --git a/plat/mediatek/mt8183/bl31_plat_setup.c b/plat/mediatek/mt8183/bl31_plat_setup.c
index 8204d77..e96b4ad 100644
--- a/plat/mediatek/mt8183/bl31_plat_setup.c
+++ b/plat/mediatek/mt8183/bl31_plat_setup.c
@@ -112,7 +112,7 @@
void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3)
{
- static console_16550_t console;
+ static console_t console;
params_early_setup(arg1);
diff --git a/plat/mediatek/mt8183/drivers/emi_mpu/emi_mpu.c b/plat/mediatek/mt8183/drivers/emi_mpu/emi_mpu.c
index 64d8548..56d2ce2 100644
--- a/plat/mediatek/mt8183/drivers/emi_mpu/emi_mpu.c
+++ b/plat/mediatek/mt8183/drivers/emi_mpu/emi_mpu.c
@@ -138,15 +138,9 @@
(FORBIDDEN << 6));
emi_mpu_set_region_protection(0x52900000UL, 0x5FFFFFFFUL, 2,
(FORBIDDEN << 3 | FORBIDDEN << 6));
- emi_mpu_set_region_protection(0x60000000UL, 0x7FFFFFFFUL, 3,
- (FORBIDDEN << 3 | FORBIDDEN << 6));
- emi_mpu_set_region_protection(0x80000000UL, 0x9FFFFFFFUL, 4,
- (FORBIDDEN << 3 | FORBIDDEN << 6));
- emi_mpu_set_region_protection(0xA0000000UL, 0xBFFFFFFFUL, 5,
- (FORBIDDEN << 3 | FORBIDDEN << 6));
- emi_mpu_set_region_protection(0xC0000000UL, 0xDFFFFFFFUL, 6,
+ emi_mpu_set_region_protection(0x60000000UL, 0xFFFFFFFFUL, 3,
(FORBIDDEN << 3 | FORBIDDEN << 6));
- emi_mpu_set_region_protection(0xE0000000UL, 0xFFFFFFFFUL, 7,
+ emi_mpu_set_region_protection(0x100000000UL, 0x23FFFFFFFUL, 4,
(FORBIDDEN << 3 | FORBIDDEN << 6));
dump_emi_mpu_regions();
}
diff --git a/plat/nvidia/tegra/common/drivers/spe/shared_console.S b/plat/nvidia/tegra/common/drivers/spe/shared_console.S
index 0be34e4..c783373 100644
--- a/plat/nvidia/tegra/common/drivers/spe/shared_console.S
+++ b/plat/nvidia/tegra/common/drivers/spe/shared_console.S
@@ -49,14 +49,14 @@
/* -------------------------------------------------
* int console_spe_register(uintptr_t baseaddr,
* uint32_t clock, uint32_t baud,
- * console_spe_t *console);
+ * console_t *console);
* Function to initialize and register a new spe
* console. Storage passed in for the console struct
* *must* be persistent (i.e. not from the stack).
* In: x0 - UART register base address
* w1 - UART clock in Hz
* w2 - Baud rate
- * x3 - pointer to empty console_spe_t struct
+ * x3 - pointer to empty console_t struct
* Out: return 1 on success, 0 on error
* Clobber list : x0, x1, x2, x6, x7, x14
* -------------------------------------------------
@@ -122,7 +122,7 @@
endfunc console_spe_core_putc
/* --------------------------------------------------------
- * int console_spe_putc(int c, console_spe_t *console)
+ * int console_spe_putc(int c, console_t *console)
* Function to output a character over the console. It
* returns the character printed on success or -1 on error.
* In : w0 - character to be printed
@@ -137,7 +137,7 @@
endfunc console_spe_putc
/* ---------------------------------------------
- * int console_spe_getc(console_spe_t *console)
+ * int console_spe_getc(console_t *console)
* Function to get a character from the console.
* It returns the character grabbed on success
* or -1 if no character is available.
@@ -174,7 +174,7 @@
endfunc console_spe_core_flush
/* ---------------------------------------------
- * int console_spe_flush(console_spe_t *console)
+ * int console_spe_flush(console_t *console)
* Function to force a write of all buffered
* data that hasn't been output.
* In : x0 - pointer to console_t structure
diff --git a/plat/nvidia/tegra/include/drivers/spe.h b/plat/nvidia/tegra/include/drivers/spe.h
index 0d6d69d..e0f8714 100644
--- a/plat/nvidia/tegra/include/drivers/spe.h
+++ b/plat/nvidia/tegra/include/drivers/spe.h
@@ -11,11 +11,6 @@
#include <drivers/console.h>
-typedef struct {
- console_t console;
- uintptr_t base;
-} console_spe_t;
-
/*
* Initialize a new spe console instance and register it with the console
* framework. The |console| pointer must point to storage that will be valid
@@ -23,6 +18,6 @@
* Its contents will be reinitialized from scratch.
*/
int console_spe_register(uintptr_t baseaddr, uint32_t clock, uint32_t baud,
- console_spe_t *console);
+ console_t *console);
#endif /* SPE_H */
diff --git a/plat/nvidia/tegra/soc/t132/plat_setup.c b/plat/nvidia/tegra/soc/t132/plat_setup.c
index 4bfc2de..43acdd6 100644
--- a/plat/nvidia/tegra/soc/t132/plat_setup.c
+++ b/plat/nvidia/tegra/soc/t132/plat_setup.c
@@ -92,7 +92,7 @@
******************************************************************************/
void plat_enable_console(int32_t id)
{
- static console_16550_t uart_console;
+ static console_t uart_console;
uint32_t console_clock;
if ((id > 0) && (id < TEGRA132_MAX_UART_PORTS)) {
@@ -109,7 +109,7 @@
console_clock,
TEGRA_CONSOLE_BAUDRATE,
&uart_console);
- console_set_scope(&uart_console.console, CONSOLE_FLAG_BOOT |
+ console_set_scope(&uart_console, CONSOLE_FLAG_BOOT |
CONSOLE_FLAG_RUNTIME | CONSOLE_FLAG_CRASH);
}
}
diff --git a/plat/nvidia/tegra/soc/t186/plat_setup.c b/plat/nvidia/tegra/soc/t186/plat_setup.c
index 06a3284..7028bfc 100644
--- a/plat/nvidia/tegra/soc/t186/plat_setup.c
+++ b/plat/nvidia/tegra/soc/t186/plat_setup.c
@@ -150,7 +150,7 @@
******************************************************************************/
void plat_enable_console(int32_t id)
{
- static console_16550_t uart_console;
+ static console_t uart_console;
uint32_t console_clock;
if ((id > 0) && (id < TEGRA186_MAX_UART_PORTS)) {
@@ -167,7 +167,7 @@
console_clock,
TEGRA_CONSOLE_BAUDRATE,
&uart_console);
- console_set_scope(&uart_console.console, CONSOLE_FLAG_BOOT |
+ console_set_scope(&uart_console, CONSOLE_FLAG_BOOT |
CONSOLE_FLAG_RUNTIME | CONSOLE_FLAG_CRASH);
}
}
diff --git a/plat/nvidia/tegra/soc/t194/plat_setup.c b/plat/nvidia/tegra/soc/t194/plat_setup.c
index 3640ade..235fba4 100644
--- a/plat/nvidia/tegra/soc/t194/plat_setup.c
+++ b/plat/nvidia/tegra/soc/t194/plat_setup.c
@@ -163,18 +163,18 @@
uint32_t console_clock = 0U;
#if ENABLE_CONSOLE_SPE
- static console_spe_t spe_console;
+ static console_t spe_console;
if (id == TEGRA_CONSOLE_SPE_ID) {
(void)console_spe_register(TEGRA_CONSOLE_SPE_BASE,
console_clock,
TEGRA_CONSOLE_BAUDRATE,
&spe_console);
- console_set_scope(&spe_console.console, CONSOLE_FLAG_BOOT |
+ console_set_scope(&spe_console, CONSOLE_FLAG_BOOT |
CONSOLE_FLAG_RUNTIME | CONSOLE_FLAG_CRASH);
}
#else
- static console_16550_t uart_console;
+ static console_t uart_console;
if ((id > 0) && (id < TEGRA194_MAX_UART_PORTS)) {
/*
@@ -190,7 +190,7 @@
console_clock,
TEGRA_CONSOLE_BAUDRATE,
&uart_console);
- console_set_scope(&uart_console.console, CONSOLE_FLAG_BOOT |
+ console_set_scope(&uart_console, CONSOLE_FLAG_BOOT |
CONSOLE_FLAG_RUNTIME | CONSOLE_FLAG_CRASH);
}
#endif
diff --git a/plat/nvidia/tegra/soc/t210/plat_setup.c b/plat/nvidia/tegra/soc/t210/plat_setup.c
index c32772d..7afbe0d 100644
--- a/plat/nvidia/tegra/soc/t210/plat_setup.c
+++ b/plat/nvidia/tegra/soc/t210/plat_setup.c
@@ -119,7 +119,7 @@
******************************************************************************/
void plat_enable_console(int32_t id)
{
- static console_16550_t uart_console;
+ static console_t uart_console;
uint32_t console_clock;
if ((id > 0) && (id < TEGRA210_MAX_UART_PORTS)) {
@@ -136,7 +136,7 @@
console_clock,
TEGRA_CONSOLE_BAUDRATE,
&uart_console);
- console_set_scope(&uart_console.console, CONSOLE_FLAG_BOOT |
+ console_set_scope(&uart_console, CONSOLE_FLAG_BOOT |
CONSOLE_FLAG_RUNTIME | CONSOLE_FLAG_CRASH);
}
}
diff --git a/plat/qemu/common/qemu_console.c b/plat/qemu/common/qemu_console.c
index fec1828..1f00f8a 100644
--- a/plat/qemu/common/qemu_console.c
+++ b/plat/qemu/common/qemu_console.c
@@ -9,7 +9,7 @@
#include <drivers/console.h>
#include <drivers/arm/pl011.h>
-static console_pl011_t console;
+static console_t console;
void qemu_console_init(void)
{
@@ -17,7 +17,7 @@
PLAT_QEMU_BOOT_UART_CLK_IN_HZ,
PLAT_QEMU_CONSOLE_BAUDRATE, &console);
- console_set_scope(&console.console, CONSOLE_FLAG_BOOT |
+ console_set_scope(&console, CONSOLE_FLAG_BOOT |
CONSOLE_FLAG_RUNTIME);
}
diff --git a/plat/renesas/rcar/rcar_common.c b/plat/renesas/rcar/rcar_common.c
index 4ea753f..dec7229 100644
--- a/plat/renesas/rcar/rcar_common.c
+++ b/plat/renesas/rcar/rcar_common.c
@@ -70,8 +70,8 @@
#include <drivers/renesas/rcar/console/console.h>
-static console_rcar_t rcar_boot_console;
-static console_rcar_t rcar_runtime_console;
+static console_t rcar_boot_console;
+static console_t rcar_runtime_console;
void rcar_console_boot_init(void)
{
@@ -81,7 +81,7 @@
if (!ret)
panic();
- console_set_scope(&rcar_boot_console.console, CONSOLE_FLAG_BOOT);
+ console_set_scope(&rcar_boot_console, CONSOLE_FLAG_BOOT);
}
void rcar_console_boot_end(void)
@@ -96,7 +96,7 @@
if (!ret)
panic();
- console_set_scope(&rcar_boot_console.console, CONSOLE_FLAG_RUNTIME);
+ console_set_scope(&rcar_boot_console, CONSOLE_FLAG_RUNTIME);
}
void rcar_console_runtime_end(void)
diff --git a/plat/rockchip/common/bl31_plat_setup.c b/plat/rockchip/common/bl31_plat_setup.c
index c4a0359..98ef415 100644
--- a/plat/rockchip/common/bl31_plat_setup.c
+++ b/plat/rockchip/common/bl31_plat_setup.c
@@ -57,7 +57,7 @@
void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3)
{
- static console_16550_t console;
+ static console_t console;
params_early_setup(arg1);
diff --git a/plat/rockchip/common/sp_min_plat_setup.c b/plat/rockchip/common/sp_min_plat_setup.c
index 6d15075..0237b16 100644
--- a/plat/rockchip/common/sp_min_plat_setup.c
+++ b/plat/rockchip/common/sp_min_plat_setup.c
@@ -52,7 +52,7 @@
void sp_min_early_platform_setup2(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3)
{
- static console_16550_t console;
+ static console_t console;
params_early_setup(arg1);
diff --git a/plat/rpi/common/rpi3_common.c b/plat/rpi/common/rpi3_common.c
index ff33694..27281f2 100644
--- a/plat/rpi/common/rpi3_common.c
+++ b/plat/rpi/common/rpi3_common.c
@@ -102,7 +102,7 @@
/*******************************************************************************
* Function that sets up the console
******************************************************************************/
-static console_16550_t rpi3_console;
+static console_t rpi3_console;
void rpi3_console_init(unsigned int base_clk_rate)
{
@@ -123,7 +123,7 @@
panic();
}
- console_set_scope(&rpi3_console.console, console_scope);
+ console_set_scope(&rpi3_console, console_scope);
}
/*******************************************************************************
diff --git a/plat/socionext/synquacer/sq_bl31_setup.c b/plat/socionext/synquacer/sq_bl31_setup.c
index b864021..9723ef9 100644
--- a/plat/socionext/synquacer/sq_bl31_setup.c
+++ b/plat/socionext/synquacer/sq_bl31_setup.c
@@ -16,7 +16,7 @@
#include <lib/mmio.h>
#include <sq_common.h>
-static console_pl011_t console;
+static console_t console;
static entry_point_info_t bl32_image_ep_info;
static entry_point_info_t bl33_image_ep_info;
@@ -69,8 +69,7 @@
PLAT_SQ_BOOT_UART_CLK_IN_HZ,
SQ_CONSOLE_BAUDRATE, &console);
- console_set_scope(&console.console, CONSOLE_FLAG_BOOT |
- CONSOLE_FLAG_RUNTIME);
+ console_set_scope(&console, CONSOLE_FLAG_BOOT | CONSOLE_FLAG_RUNTIME);
/* There are no parameters from BL2 if BL31 is a reset vector */
assert(arg0 == 0U);
diff --git a/plat/socionext/uniphier/uniphier_console.S b/plat/socionext/uniphier/uniphier_console.S
index 1113c6e..f3dde0c 100644
--- a/plat/socionext/uniphier/uniphier_console.S
+++ b/plat/socionext/uniphier/uniphier_console.S
@@ -17,7 +17,7 @@
*/
.globl uniphier_console_putc
func uniphier_console_putc
- ldr x1, [x1, #CONSOLE_T_DRVDATA]
+ ldr x1, [x1, #CONSOLE_T_BASE]
/* Wait until the transmitter FIFO gets empty */
0: ldr w2, [x1, #UNIPHIER_UART_LSR]
@@ -36,7 +36,7 @@
*/
.globl uniphier_console_getc
func uniphier_console_getc
- ldr x0, [x0, #CONSOLE_T_DRVDATA]
+ ldr x0, [x0, #CONSOLE_T_BASE]
ldr w1, [x0, #UNIPHIER_UART_LSR]
tbz w1, #UNIPHIER_UART_LSR_DR_BIT, 0f
@@ -55,7 +55,7 @@
*/
.global uniphier_console_flush
func uniphier_console_flush
- ldr x0, [x0, #CONSOLE_T_DRVDATA]
+ ldr x0, [x0, #CONSOLE_T_BASE]
/* wait until the transmitter gets empty */
0: ldr w1, [x0, #UNIPHIER_UART_LSR]
diff --git a/plat/socionext/uniphier/uniphier_console_setup.c b/plat/socionext/uniphier/uniphier_console_setup.c
index 1851e4d..e2ae8bf 100644
--- a/plat/socionext/uniphier/uniphier_console_setup.c
+++ b/plat/socionext/uniphier/uniphier_console_setup.c
@@ -17,28 +17,21 @@
#define UNIPHIER_UART_OFFSET 0x100
#define UNIPHIER_UART_NR_PORTS 4
-struct uniphier_console {
- struct console console;
- uintptr_t base;
-};
-
/* These callbacks are implemented in assembly to use crash_console_helpers.S */
int uniphier_console_putc(int character, struct console *console);
int uniphier_console_getc(struct console *console);
int uniphier_console_flush(struct console *console);
-static struct uniphier_console uniphier_console = {
- .console = {
- .flags = CONSOLE_FLAG_BOOT |
+static console_t uniphier_console = {
+ .flags = CONSOLE_FLAG_BOOT |
#if DEBUG
- CONSOLE_FLAG_RUNTIME |
+ CONSOLE_FLAG_RUNTIME |
#endif
- CONSOLE_FLAG_CRASH |
- CONSOLE_FLAG_TRANSLATE_CRLF,
- .putc = uniphier_console_putc,
- .getc = uniphier_console_getc,
- .flush = uniphier_console_flush,
- },
+ CONSOLE_FLAG_CRASH |
+ CONSOLE_FLAG_TRANSLATE_CRLF,
+ .putc = uniphier_console_putc,
+ .getc = uniphier_console_getc,
+ .flush = uniphier_console_flush,
};
static const uintptr_t uniphier_uart_base[] = {
@@ -86,7 +79,7 @@
plat_error_handler(-EINVAL);
uniphier_console.base = base;
- console_register(&uniphier_console.console);
+ console_register(&uniphier_console);
/*
* The hardware might be still printing characters queued up in the
diff --git a/plat/socionext/uniphier/uniphier_io_storage.c b/plat/socionext/uniphier/uniphier_io_storage.c
index 96180f1..e89c835 100644
--- a/plat/socionext/uniphier/uniphier_io_storage.c
+++ b/plat/socionext/uniphier/uniphier_io_storage.c
@@ -23,7 +23,6 @@
#define UNIPHIER_ROM_REGION_BASE 0x00000000ULL
#define UNIPHIER_ROM_REGION_SIZE 0x10000000ULL
-#define UNIPHIER_OCM_REGION_BASE 0x30000000ULL
#define UNIPHIER_OCM_REGION_SIZE 0x00040000ULL
#define UNIPHIER_BLOCK_BUF_OFFSET 0x04200000UL
@@ -278,12 +277,20 @@
return uniphier_io_memmap_setup(0x70000);
}
-static int uniphier_io_usb_setup(unsigned int soc_id, size_t buffer_offset)
+static const uintptr_t uniphier_ocm_base[] = {
+ [UNIPHIER_SOC_LD11] = 0x30000000,
+ [UNIPHIER_SOC_LD20] = 0x30000000,
+ [UNIPHIER_SOC_PXS3] = 0x30000000,
+};
+
+static int uniphier_io_rom_api_setup(unsigned int soc)
{
- struct io_block_dev_spec *block_dev_spec;
+ uintptr_t ocm_base;
int ret;
- /* use ROM API for loading images from USB storage */
+ assert(soc < ARRAY_SIZE(uniphier_ocm_base));
+ ocm_base = uniphier_ocm_base[soc];
+
ret = mmap_add_dynamic_region(UNIPHIER_ROM_REGION_BASE,
UNIPHIER_ROM_REGION_BASE,
UNIPHIER_ROM_REGION_SIZE,
@@ -296,14 +303,26 @@
* load functions provided by the ROM use this memory region as a work
* area, but do not cater to cache coherency.
*/
- ret = mmap_add_dynamic_region(UNIPHIER_OCM_REGION_BASE,
- UNIPHIER_OCM_REGION_BASE,
+ ret = mmap_add_dynamic_region(ocm_base, ocm_base,
UNIPHIER_OCM_REGION_SIZE,
MT_DEVICE | MT_RW | MT_SECURE);
if (ret)
return ret;
+ return 0;
+}
+
+static int uniphier_io_usb_setup(unsigned int soc, size_t buffer_offset)
+{
+ struct io_block_dev_spec *block_dev_spec;
+ int ret;
+
+ /* use ROM API for loading images from USB storage */
+ ret = uniphier_io_rom_api_setup(soc);
+ if (ret)
+ return ret;
+
- ret = uniphier_usb_init(soc_id, &block_dev_spec);
+ ret = uniphier_usb_init(soc, &block_dev_spec);
if (ret)
return ret;
diff --git a/plat/socionext/uniphier/uniphier_soc_info.c b/plat/socionext/uniphier/uniphier_soc_info.c
index 377532d..0e7a2d1 100644
--- a/plat/socionext/uniphier/uniphier_soc_info.c
+++ b/plat/socionext/uniphier/uniphier_soc_info.c
@@ -4,18 +4,25 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
+#include <common/bl_common.h>
#include <lib/mmio.h>
#include "uniphier.h"
-#define UNIPHIER_REVISION 0x5f800000
+#define UNIPHIER_REVISION 0x5f800000UL
+#define UNIPHIER_REVISION_NEW 0x1f800000UL
static unsigned int uniphier_get_revision_field(unsigned int mask,
unsigned int shift)
{
- uint32_t revision = mmio_read_32(UNIPHIER_REVISION);
+ uintptr_t reg;
+
+ if (BL_CODE_BASE >= 0x80000000UL)
+ reg = UNIPHIER_REVISION;
+ else
+ reg = UNIPHIER_REVISION_NEW;
- return (revision >> shift) & mask;
+ return (mmio_read_32(reg) >> shift) & mask;
}
unsigned int uniphier_get_soc_type(void)
diff --git a/plat/st/stm32mp1/bl2_plat_setup.c b/plat/st/stm32mp1/bl2_plat_setup.c
index d9e29b4..024dbe0 100644
--- a/plat/st/stm32mp1/bl2_plat_setup.c
+++ b/plat/st/stm32mp1/bl2_plat_setup.c
@@ -31,7 +31,7 @@
#include <stm32mp1_context.h>
#include <stm32mp1_dbgmcu.h>
-static struct console_stm32 console;
+static console_t console;
static struct stm32mp_auth_ops stm32mp1_auth_ops;
static void print_reset_reason(void)
@@ -273,7 +273,7 @@
panic();
}
- console_set_scope(&console.console, CONSOLE_FLAG_BOOT |
+ console_set_scope(&console, CONSOLE_FLAG_BOOT |
CONSOLE_FLAG_CRASH | CONSOLE_FLAG_TRANSLATE_CRLF);
stm32mp_print_cpuinfo();
diff --git a/plat/st/stm32mp1/sp_min/sp_min_setup.c b/plat/st/stm32mp1/sp_min/sp_min_setup.c
index e10dfbf..4e74c27 100644
--- a/plat/st/stm32mp1/sp_min/sp_min_setup.c
+++ b/plat/st/stm32mp1/sp_min/sp_min_setup.c
@@ -35,7 +35,7 @@
******************************************************************************/
static entry_point_info_t bl33_image_ep_info;
-static struct console_stm32 console;
+static console_t console;
/*******************************************************************************
* Interrupt handler for FIQ (secure IRQ)
@@ -142,7 +142,7 @@
#ifdef DEBUG
console_flags |= CONSOLE_FLAG_RUNTIME;
#endif
- console_set_scope(&console.console, console_flags);
+ console_set_scope(&console, console_flags);
}
}
diff --git a/plat/ti/k3/common/k3_console.c b/plat/ti/k3/common/k3_console.c
index ba0ddac..8c44c17 100644
--- a/plat/ti/k3/common/k3_console.c
+++ b/plat/ti/k3/common/k3_console.c
@@ -13,7 +13,7 @@
void bl31_console_setup(void)
{
- static console_16550_t console;
+ static console_t console;
/* Initialize the console to provide early debug support */
console_16550_register(K3_USART_BASE, K3_USART_CLK_SPEED,
diff --git a/plat/xilinx/versal/bl31_versal_setup.c b/plat/xilinx/versal/bl31_versal_setup.c
index a5cf05e..03b7fbb 100644
--- a/plat/xilinx/versal/bl31_versal_setup.c
+++ b/plat/xilinx/versal/bl31_versal_setup.c
@@ -22,7 +22,7 @@
static entry_point_info_t bl32_image_ep_info;
static entry_point_info_t bl33_image_ep_info;
-static console_pl011_t versal_runtime_console;
+static console_t versal_runtime_console;
/*
* Return a pointer to the 'entry_point_info' structure of the next image for
@@ -71,7 +71,7 @@
if (rc == 0)
panic();
- console_set_scope(&versal_runtime_console.console, CONSOLE_FLAG_BOOT |
+ console_set_scope(&versal_runtime_console, CONSOLE_FLAG_BOOT |
CONSOLE_FLAG_RUNTIME);
/* Initialize the platform config for future decision making */
diff --git a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
index 6e0e811..b6d8770 100644
--- a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
+++ b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
@@ -62,12 +62,12 @@
{
uint64_t atf_handoff_addr;
/* Register the console to provide early debug support */
- static console_cdns_t bl31_boot_console;
+ static console_t bl31_boot_console;
(void)console_cdns_register(ZYNQMP_UART_BASE,
zynqmp_get_uart_clk(),
ZYNQMP_UART_BAUDRATE,
&bl31_boot_console);
- console_set_scope(&bl31_boot_console.console,
+ console_set_scope(&bl31_boot_console,
CONSOLE_FLAG_RUNTIME | CONSOLE_FLAG_BOOT);
/* Initialize the platform config for future decision making */
diff --git a/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c b/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c
index 7f0ac74..5e770f7 100644
--- a/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c
+++ b/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c
@@ -21,12 +21,12 @@
* Register a different console than already in use to display
* messages from TSP
*/
- static console_cdns_t tsp_boot_console;
+ static console_t tsp_boot_console;
(void)console_cdns_register(ZYNQMP_UART_BASE,
zynqmp_get_uart_clk(),
ZYNQMP_UART_BAUDRATE,
&tsp_boot_console);
- console_set_scope(&tsp_boot_console.console,
+ console_set_scope(&tsp_boot_console,
CONSOLE_FLAG_RUNTIME | CONSOLE_FLAG_BOOT);
/* Initialize the platform config for future decision making */
diff --git a/tools/memory/print_memory_map.py b/tools/memory/print_memory_map.py
index 35cccd3..8a84018 100755
--- a/tools/memory/print_memory_map.py
+++ b/tools/memory/print_memory_map.py
@@ -1,6 +1,6 @@
#!/usr/bin/env python3
#
-# Copyright (c) 2019, Arm Limited. All rights reserved.
+# Copyright (c) 2019-2020, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -22,6 +22,7 @@
'__DATA_START__', '__DATA_END__',
'__STACKS_START__', '__STACKS_END__',
'__BSS_END',
+ '__COHERENT_RAM_START__', '__COHERENT_RAM_END__',
]
# Regex to extract address from map file
@@ -31,8 +32,11 @@
address_list = []
# Get the directory from command line or use a default one
+inverted_print = True
if len(sys.argv) >= 2:
build_dir = sys.argv[1]
+ if len(sys.argv) >= 3:
+ inverted_print = sys.argv[2] == '0'
else:
build_dir = 'build/fvp/debug'
@@ -43,7 +47,10 @@
with open (file_path, 'rt') as mapfile:
for line in mapfile:
for symbol in blx_symbols:
- if line.find(symbol) > 0 and line.find("ASSERT") < 0:
+ # Regex to find symbol definition
+ line_pattern = re.compile(r"\b0x\w*\s*" + symbol + "\s= .")
+ match = line_pattern.search(line)
+ if match:
# Extract address from line
match = address_pattern.search(line)
if match:
@@ -52,17 +59,21 @@
# Sort by address
address_list.sort(key=operator.itemgetter(0))
+# Invert list for lower address at bottom
+if inverted_print:
+ address_list = reversed(address_list)
+
# Generate memory view
-print('{:-^87}'.format('Memory Map from: ' + build_dir))
-for address in reversed(address_list):
+print('{:-^93}'.format('Memory Map from: ' + build_dir))
+for address in address_list:
if "bl1" in address[2]:
- print(address[0], '+{:-^20}+ |{:^20}| |{:^20}|'.format(address[1], '', ''))
+ print(address[0], '+{:-^22}+ |{:^22}| |{:^22}|'.format(address[1], '', ''))
elif "bl2" in address[2]:
- print(address[0], '|{:^20}| +{:-^20}+ |{:^20}|'.format('', address[1], ''))
+ print(address[0], '|{:^22}| +{:-^22}+ |{:^22}|'.format('', address[1], ''))
elif "bl31" in address[2]:
- print(address[0], '|{:^20}| |{:^20}| +{:-^20}+'.format('', '', address[1]))
+ print(address[0], '|{:^22}| |{:^22}| +{:-^22}+'.format('', '', address[1]))
else:
- print(address[0], '|{:^20}| |{:^20}| +{:-^20}+'.format('', '', address[1]))
+ print(address[0], '|{:^22}| |{:^22}| +{:-^22}+'.format('', '', address[1]))
-print('{:^20}{:_^20} {:_^20} {:_^20}'.format('', '', '', ''))
-print('{:^20}{:^20} {:^20} {:^20}'.format('address', 'bl1', 'bl2', 'bl31'))
+print('{:^20}{:_^22} {:_^22} {:_^22}'.format('', '', '', ''))
+print('{:^20}{:^22} {:^22} {:^22}'.format('address', 'bl1', 'bl2', 'bl31'))
diff --git a/tools/sptool/sp_mk_generator.py b/tools/sptool/sp_mk_generator.py
new file mode 100755
index 0000000..6b6fa19
--- /dev/null
+++ b/tools/sptool/sp_mk_generator.py
@@ -0,0 +1,100 @@
+#!/usr/bin/python3
+# Copyright (c) 2020, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+
+"""
+This script is invoked by Make system and generates secure partition makefile.
+It expects platform provided secure partition layout file which contains list
+of Secure Partition Images and Partition manifests(PM).
+Layout file can exist outside of TF-A tree and the paths of Image and PM files
+must be relative to it.
+
+This script parses the layout file and generates a make file which updates
+FDT_SOURCES, FIP_ARGS and SPTOOL_ARGS which are used in later build steps.
+This script also gets SP "uuid" from parsing its PM and converting it to a
+standard format.
+
+param1: Generated mk file "sp_gen.mk"
+param2: "SP_LAYOUT_FILE", json file containing platform provided information
+param3: plat out directory
+
+Generated "sp_gen.mk" file contains triplet of following information for each
+Secure Partition entry
+ FDT_SOURCES += sp1.dts
+ SPTOOL_ARGS += -i sp1.bin:sp1.dtb -o sp1.pkg
+ FIP_ARGS += --blob uuid=XXXXX-XXX...,file=sp1.pkg
+
+A typical SP_LAYOUT_FILE file will look like
+{
+ "SP1" : {
+ "image": "sp1.bin",
+ "pm": "test/sp1.dts"
+ },
+
+ "SP2" : {
+ "image": "sp2.bin",
+ "pm": "test/sp2.dts"
+ }
+
+ ...
+}
+
+"""
+
+import getopt
+import json
+import os
+import re
+import sys
+import uuid
+
+with open(sys.argv[2],'r') as in_file:
+ data = json.load(in_file)
+json_file = os.path.abspath(sys.argv[2])
+json_dir = os.path.dirname(json_file)
+gen_file = sys.argv[1]
+out_dir = sys.argv[3][2:]
+dtb_dir = out_dir + "/fdts/"
+print(dtb_dir)
+
+with open(gen_file, 'w') as out_file:
+ for key in data.keys():
+
+ """
+ Append FDT_SOURCES
+ """
+ dts = os.path.join(json_dir, data[key]['pm'])
+ dtb = dtb_dir + os.path.basename(data[key]['pm'][:-1] + "b")
+ out_file.write("FDT_SOURCES += " + dts + "\n")
+
+ """
+ Update SPTOOL_ARGS
+ """
+ dst = out_dir + "/" + key + ".pkg"
+ src = [ json_dir + "/" + data[key]['image'] , dtb ]
+ out_file.write("SPTOOL_ARGS += -i " + ":".join(src) + " -o " + dst + "\n")
+
+ """
+ Extract uuid from partition manifest
+ """
+ pm_file = open(dts)
+ key = "uuid"
+
+ for line in pm_file:
+ if key in line:
+ uuid_hex = re.findall(r'\<(.+?)\>', line)[0];
+
+ # PM has uuid in format 0xABC... 0x... 0x... 0x...
+ # Get rid of '0x' and spaces and convert to string of hex digits
+ uuid_hex = uuid_hex.replace('0x','').replace(' ','')
+ # make UUID from a string of hex digits
+ uuid_std = uuid.UUID(uuid_hex)
+ # convert UUID to a string of hex digits in standard form
+ uuid_std = str(uuid_std)
+
+ """
+ Append FIP_ARGS
+ """
+ out_file.write("FIP_ARGS += --blob uuid=" + uuid_std + ",file=" + dst + "\n")
+ out_file.write("\n")