bl31: Add error reporting registers
This patch adds cpumerrsr_el1 and l2merrsr_el1 to the register dump on
error for applicable CPUs.
These registers hold the ECC errors on L1 and L2 caches.
This patch updates the A53, A57, A72, A73 (l2merrsr_el1 only) CPU libraries.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
diff --git a/lib/cpus/aarch64/cortex_a72.S b/lib/cpus/aarch64/cortex_a72.S
index eb37f2c..9f04fb7 100644
--- a/lib/cpus/aarch64/cortex_a72.S
+++ b/lib/cpus/aarch64/cortex_a72.S
@@ -231,11 +231,13 @@
*/
.section .rodata.cortex_a72_regs, "aS"
cortex_a72_regs: /* The ascii list of register names to be reported */
- .asciz "cpuectlr_el1", ""
+ .asciz "cpuectlr_el1", "cpumerrsr_el1", "l2merrsr_el1", ""
func cortex_a72_cpu_reg_dump
adr x6, cortex_a72_regs
mrs x8, CPUECTLR_EL1
+ mrs x9, CPUMERRSR_EL1
+ mrs x10, L2MERRSR_EL1
ret
endfunc cortex_a72_cpu_reg_dump