feat(cm): test integrity of el1_ctx registers
* This patch adds support to tsp (BL32) Image, to exercise
EL1_context registers at S-EL1.
* Adds a SMC function ID "MODIFY_EL1_CTX" to handle EL1_CTX
registers at S-EL1 and overwrite them.
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: Id4f2b3b748f7bc9e6c9d72a2f03d50aefbfb61cb
diff --git a/bl32/tsp/tsp_main.c b/bl32/tsp/tsp_main.c
index ae38d69..8c6b2ed 100644
--- a/bl32/tsp/tsp_main.c
+++ b/bl32/tsp/tsp_main.c
@@ -11,6 +11,7 @@
#include <arch_features.h>
#include <arch_helpers.h>
#include <bl32/tsp/tsp.h>
+#include <bl32/tsp/tsp_el1_context.h>
#include <common/bl_common.h>
#include <common/build_message.h>
#include <common/debug.h>
@@ -278,6 +279,17 @@
/* Toggle the dit bit */
write_dit(service_arg0 != 0U ? 0 : DIT_BIT);
break;
+ case TSP_MODIFY_EL1_CTX:
+ /*
+ * Write dummy values to EL1 context registers, to simulate
+ * their usage in the secure world.
+ */
+ if (arg1 == TSP_CORRUPT_EL1_REGS) {
+ modify_el1_ctx_regs(TSP_CORRUPT_EL1_REGS);
+ } else {
+ modify_el1_ctx_regs(TSP_RESTORE_EL1_REGS);
+ }
+ break;
default:
break;
}