refactor(xilinx): rename gic macros to make common
Rename macros PLAT_VERSAL_GICD_BASE, PLAT_VERSAL_GICR_BASE,
PLAT_VERSAL_NET_GICD_BASE and PLAT_VERSAL_NET_GICR_BASE to
PLAT_GICD_BASE_VALUE and PLAT_GICR_BASE_VALUE to make common
for both Versal and Versal NET platforms.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ibcebfb8e741e828ef272b32cbedfb4dcbf8629b6
diff --git a/plat/xilinx/versal/pm_service/pm_client.c b/plat/xilinx/versal/pm_service/pm_client.c
index 54f4eb2..7910d8f 100644
--- a/plat/xilinx/versal/pm_service/pm_client.c
+++ b/plat/xilinx/versal/pm_service/pm_client.c
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2019-2022, Xilinx, Inc. All rights reserved.
+ * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -121,7 +122,7 @@
uint32_t reg_num;
uint32_t device_id;
uint8_t pm_wakeup_nodes_set[XPM_NODEIDX_DEV_MAX] = { 0U };
- uintptr_t isenabler1 = PLAT_VERSAL_GICD_BASE + GICD_ISENABLER + 4;
+ uintptr_t isenabler1 = PLAT_GICD_BASE_VALUE + GICD_ISENABLER + 4;
for (reg_num = 0U; reg_num < NUM_GICD_ISENABLER; reg_num++) {
uint32_t base_irq = reg_num << ISENABLER_SHIFT;