commit 696ed4fdf5c7db00450075c5407de7ff1ef1e854
author Madhukar Pappireddy <madhukar.pappireddy@arm.com> Tue Oct 31 23:15:55 2023 +0100
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> Tue Oct 31 23:15:55 2023 +0100
tree dd8fdad1e5b9f84b91db4fc4afbcad1607111b58
parent 51923962c199b3ba8165d7dc0b256e552acf6652
parent dc4ed3387ed75ab5d60a72bbaf7fe2a6fed87104

Merge "feat(cpufeat): add memory retention bit define for CLUSTERPWRDN" into integration

include/arch/aarch32/arch.h

diff --git a/include/arch/aarch32/arch.h b/include/arch/aarch32/arch.h
index da4ee7f..a711753 100644
--- a/include/arch/aarch32/arch.h
+++ b/include/arch/aarch32/arch.h
@@ -796,5 +796,6 @@
 #define DSU_CLUSTER_PWR_OFF	0
 #define DSU_CLUSTER_PWR_ON	1
 #define DSU_CLUSTER_PWR_MASK	U(1)
+#define DSU_CLUSTER_MEM_RET	BIT(1)
 
 #endif /* ARCH_H */

include/arch/aarch64/arch.h

diff --git a/include/arch/aarch64/arch.h b/include/arch/aarch64/arch.h
index 001fad5..13927bd 100644
--- a/include/arch/aarch64/arch.h
+++ b/include/arch/aarch64/arch.h
@@ -1416,6 +1416,7 @@
 #define DSU_CLUSTER_PWR_OFF	0
 #define DSU_CLUSTER_PWR_ON	1
 #define DSU_CLUSTER_PWR_MASK	U(1)
+#define DSU_CLUSTER_MEM_RET	BIT(1)
 
 /*******************************************************************************
  * Definitions for CPU Power/Performance Management registers