commit | 691b49da5123e8ac40477fd6b144614089b9bc59 | [log] [tgz] |
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author | Heyi Guo <guoheyi@linux.alibaba.com> | Tue May 19 16:45:17 2020 +0800 |
committer | Manish Pandey <manish.pandey2@arm.com> | Wed Feb 03 11:12:30 2021 +0000 |
tree | 3cbc53eb4f6d34eb7b971c4a6060247e0c55e3c2 | |
parent | ce380250c2b6aa89c2721a5f7f8c948064c14173 [diff] |
drivers/gicv3: also shift eSPI register offset in GICD_OFFSET_64() ESPI register offset should also be shifted right by REG##R_SHIFT to keep consistent. It is not a functional issue, for GICD_OFFSET_64() is only used for GICD_IROUTER<E>, and IROUTER_SHIFT is 0. Signed-off-by: Heyi Guo <guoheyi@linux.alibaba.com> Change-Id: I76eee5c50e4300890e78e80bddde135ce88daa2d