stm32mp1: Add console support
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
diff --git a/plat/st/stm32mp1/stm32mp1_helper.S b/plat/st/stm32mp1/stm32mp1_helper.S
index 421d957..b0ea0d8 100644
--- a/plat/st/stm32mp1/stm32mp1_helper.S
+++ b/plat/st/stm32mp1/stm32mp1_helper.S
@@ -8,6 +8,14 @@
#include <asm_macros.S>
#include <bl_common.h>
#include <platform_def.h>
+#include <stm32_gpio.h>
+#include <stm32mp1_rcc.h>
+
+#define GPIO_BANK_G_ADDRESS 0x50008000
+#define GPIO_TX_PORT 11
+#define GPIO_TX_SHIFT (GPIO_TX_PORT << 1)
+#define GPIO_TX_ALT_SHIFT ((GPIO_TX_PORT - GPIO_ALT_LOWER_LIMIT) << 2)
+#define STM32MP1_HSI_CLK 64000000
.globl platform_mem_init
.globl plat_report_exception
@@ -16,6 +24,9 @@
.globl plat_reset_handler
.globl plat_is_my_cpu_primary
.globl plat_my_core_pos
+ .globl plat_crash_console_init
+ .globl plat_crash_console_flush
+ .globl plat_crash_console_putc
.globl plat_panic_handler
func platform_mem_init
@@ -92,3 +103,78 @@
ldcopr r0, MPIDR
b plat_stm32mp1_get_core_pos
endfunc plat_my_core_pos
+
+ /* ---------------------------------------------
+ * int plat_crash_console_init(void)
+ *
+ * Initialize the crash console without a C Runtime stack.
+ * ---------------------------------------------
+ */
+func plat_crash_console_init
+ /* Enable GPIOs for UART4 TX */
+ ldr r1, =(RCC_BASE + RCC_MP_AHB4ENSETR)
+ ldr r2, [r1]
+ /* Configure GPIO G11 */
+ orr r2, r2, #RCC_MP_AHB4ENSETR_GPIOGEN
+ str r2, [r1]
+ ldr r1, =GPIO_BANK_G_ADDRESS
+ /* Set GPIO mode alternate */
+ ldr r2, [r1, #GPIO_MODE_OFFSET]
+ bic r2, r2, #(GPIO_MODE_MASK << GPIO_TX_SHIFT)
+ orr r2, r2, #(GPIO_MODE_ALTERNATE << GPIO_TX_SHIFT)
+ str r2, [r1, #GPIO_MODE_OFFSET]
+ /* Set GPIO speed low */
+ ldr r2, [r1, #GPIO_SPEED_OFFSET]
+ bic r2, r2, #(GPIO_SPEED_MASK << GPIO_TX_SHIFT)
+ str r2, [r1, #GPIO_SPEED_OFFSET]
+ /* Set no-pull */
+ ldr r2, [r1, #GPIO_PUPD_OFFSET]
+ bic r2, r2, #(GPIO_PULL_MASK << GPIO_TX_SHIFT)
+ str r2, [r1, #GPIO_PUPD_OFFSET]
+ /* Set alternate AF6 */
+ ldr r2, [r1, #GPIO_AFRH_OFFSET]
+ bic r2, r2, #(GPIO_ALTERNATE_MASK << GPIO_TX_ALT_SHIFT)
+ orr r2, r2, #(GPIO_ALTERNATE_6 << GPIO_TX_ALT_SHIFT)
+ str r2, [r1, #GPIO_AFRH_OFFSET]
+
+ /* Enable UART clock, with HSI source */
+ ldr r1, =(RCC_BASE + RCC_UART24CKSELR)
+ mov r2, #RCC_UART24CKSELR_HSI
+ str r2, [r1]
+ ldr r1, =(RCC_BASE + RCC_MP_APB1ENSETR)
+ ldr r2, [r1]
+ orr r2, r2, #RCC_MP_APB1ENSETR_UART4EN
+ str r2, [r1]
+
+ ldr r0, =STM32MP1_DEBUG_USART_BASE
+ ldr r1, =STM32MP1_HSI_CLK
+ ldr r2, =STM32MP1_UART_BAUDRATE
+ b console_core_init
+endfunc plat_crash_console_init
+
+ /* ---------------------------------------------
+ * int plat_crash_console_flush(void)
+ *
+ * Flush the crash console without a C Runtime stack.
+ * ---------------------------------------------
+ */
+func plat_crash_console_flush
+ ldr r1, =STM32MP1_DEBUG_USART_BASE
+ b console_core_flush
+endfunc plat_crash_console_flush
+
+ /* ---------------------------------------------
+ * int plat_crash_console_putc(int c)
+ *
+ * Print a character on the crash console without a C Runtime stack.
+ * Clobber list : r1 - r3
+ *
+ * In case of bootloading through uart, we keep console crash as this.
+ * Characters could be sent to the programmer, but will be ignored.
+ * No specific code in that case.
+ * ---------------------------------------------
+ */
+func plat_crash_console_putc
+ ldr r1, =STM32MP1_DEBUG_USART_BASE
+ b console_core_putc
+endfunc plat_crash_console_putc