commit 67e195235b0342b234e669ae8bbbf62964a1fd32
author Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Tue Dec 15 18:22:16 2020 +0900
committer Marek Vasut <marek.vasut+renesas@gmail.com> Sat Jul 10 17:35:43 2021 +0200
tree a6a8b03d5d6db35293dd21096283e848c6a0f986
parent 63c76f0d0e074afb538d7935f1e83f0be892bfaf

feat(plat/rcar3): add a DRAM size setting for M3N

This commit adds a DRAM size setting when building with
RCAR_DRAM_LPDDR4_MEMCONF=2 for M3N Ver.1.1 4GB DRAM.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: Ib7fea862ab2e0bcafaf39ec030384f0fddda9b96

plat/renesas/rcar/bl2_plat_setup.c

diff --git a/plat/renesas/rcar/bl2_plat_setup.c b/plat/renesas/rcar/bl2_plat_setup.c
index b479859..1d2977a 100644
--- a/plat/renesas/rcar/bl2_plat_setup.c
+++ b/plat/renesas/rcar/bl2_plat_setup.c
@@ -718,8 +718,13 @@
 		break;
 
 	case PRR_PRODUCT_M3N:
+#if (RCAR_DRAM_LPDDR4_MEMCONF == 2)
+		/* 4GB(4GBx1) */
+		dram_config[1] = 0x100000000ULL;
+#elif (RCAR_DRAM_LPDDR4_MEMCONF == 1)
 		/* 2GB(1GBx2) */
 		dram_config[1] = 0x80000000ULL;
+#endif
 		break;
 
 	case PRR_PRODUCT_V3M: