Tegra194: SiP: clear RAS corrected error records
This patch introduces a function ID to clear all the RAS error
records for corrected errors.
Per latest requirement, ARM RAS corrected errors will be reported to
lower ELs via interrupts and cleared via SMC. This patch provides
required function to clear RAS error status.
This patch also sets up all required RAS Corrected errors in order to
route RAS corrected errors to lower ELs.
Change-Id: I554ba1d0797b736835aa27824782703682c91e51
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Signed-off-by: David Pu <dpu@nvidia.com>
diff --git a/plat/nvidia/tegra/soc/t194/drivers/include/mce_private.h b/plat/nvidia/tegra/soc/t194/drivers/include/mce_private.h
index 1fe3aad..6dafeb2 100644
--- a/plat/nvidia/tegra/soc/t194/drivers/include/mce_private.h
+++ b/plat/nvidia/tegra/soc/t194/drivers/include/mce_private.h
@@ -58,6 +58,7 @@
void nvg_enable_strict_checking_mode(void);
void nvg_system_shutdown(void);
void nvg_system_reboot(void);
+void nvg_clear_hsm_corr_status(void);
/* declarations for assembly functions */
void nvg_set_request_data(uint64_t req, uint64_t data);
@@ -71,5 +72,6 @@
void mce_enable_strict_checking(void);
void mce_system_shutdown(void);
void mce_system_reboot(void);
+void mce_clear_hsm_corr_status(void);
#endif /* MCE_PRIVATE_H */