commit b8c581f42ae61efa6dbb4670237830eb86237029
author Jay Buddhabhatti <jay.buddhabhatti@amd.com> Mon Jun 24 01:47:39 2024 -0700
committer Jay Buddhabhatti <jay.buddhabhatti@amd.com> Wed Jul 31 02:44:43 2024 -0700
tree 23915c29f811fd1c61cc04a9e5080cdf5a81c3cc
parent b8fb9ee6214083c0f57dbc1f3c7626849aa7eff6

fix(xilinx): fix logic to read ipi response

Currently, PLM IPI command supports total 8 32-bit payloads. But existing
logic to read IPI response in TF-A is trying to read 9 32-bit payloads
(ret status + 8 ret payloads) in case of IPI_CRC_CHECK enabled which is
incorrect.

So, fix logic to read only 8 32-bit payloads (ret status + 6 ret payloads + CRC)
in case when IPI_CRC_CHECK is enabled and read 7 32-bit payloads
(ret status + 5 ret payloads + CRC) in case when IPI_CRC_CHECK is disabled.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I0abca2f787cc7a66fdd5522e6bd15a9771029071