Tegra: enable 'signed-comparison' compilation warning/errors
This patch enables the 'sign-compare' flag, to enable warning/errors
for comparisons between signed/unsigned variables. The warning has
been enabled for all the Tegra platforms, to start with.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
diff --git a/common/runtime_svc.c b/common/runtime_svc.c
index 7b38847..0ea4cd0 100644
--- a/common/runtime_svc.c
+++ b/common/runtime_svc.c
@@ -36,15 +36,16 @@
unsigned int flags)
{
u_register_t x1, x2, x3, x4;
- int index, idx;
+ int index;
+ unsigned int idx;
const rt_svc_desc_t *rt_svc_descs;
assert(handle);
idx = get_unique_oen_from_smc_fid(smc_fid);
- assert(idx >= 0 && idx < MAX_RT_SVCS);
+ assert(idx < MAX_RT_SVCS);
index = rt_svc_descs_indices[idx];
- if (index < 0 || index >= RT_SVC_DECS_NUM)
+ if (index < 0 || index >= (int)RT_SVC_DECS_NUM)
SMC_RET1(handle, SMC_UNK);
rt_svc_descs = (rt_svc_desc_t *) RT_SVC_DESCS_START;
@@ -89,7 +90,8 @@
******************************************************************************/
void runtime_svc_init(void)
{
- int rc = 0, index, start_idx, end_idx;
+ int rc = 0;
+ unsigned int index, start_idx, end_idx;
/* Assert the number of descriptors detected are less than maximum indices */
assert((RT_SVC_DESCS_END >= RT_SVC_DESCS_START) &&
diff --git a/lib/cpus/errata_report.c b/lib/cpus/errata_report.c
index 4d9757e..1e1fc78 100644
--- a/lib/cpus/errata_report.c
+++ b/lib/cpus/errata_report.c
@@ -60,7 +60,7 @@
* Applied: INFO
* Not applied: VERBOSE
*/
-void errata_print_msg(int status, const char *cpu, const char *id)
+void errata_print_msg(unsigned int status, const char *cpu, const char *id)
{
/* Errata status strings */
static const char *const errata_status_str[] = {
diff --git a/lib/psci/psci_common.c b/lib/psci/psci_common.c
index 763de04..f31b323 100644
--- a/lib/psci/psci_common.c
+++ b/lib/psci/psci_common.c
@@ -332,7 +332,7 @@
unsigned int node_index[])
{
unsigned int parent_node = psci_cpu_pd_nodes[cpu_idx].parent_node;
- int i;
+ unsigned int i;
for (i = PSCI_CPU_PWR_LVL + 1; i <= end_lvl; i++) {
*node_index++ = parent_node;
@@ -901,7 +901,7 @@
*****************************************************************************/
int psci_secondaries_brought_up(void)
{
- int idx, n_valid = 0;
+ unsigned int idx, n_valid = 0;
for (idx = 0; idx < ARRAY_SIZE(psci_cpu_pd_nodes); idx++) {
if (psci_cpu_pd_nodes[idx].mpidr != PSCI_INVALID_MPIDR)
diff --git a/lib/psci/psci_main.c b/lib/psci/psci_main.c
index 2a6644b..257479a 100644
--- a/lib/psci/psci_main.c
+++ b/lib/psci/psci_main.c
@@ -209,7 +209,7 @@
int psci_affinity_info(u_register_t target_affinity,
unsigned int lowest_affinity_level)
{
- unsigned int target_idx;
+ int target_idx;
/* We dont support level higher than PSCI_CPU_PWR_LVL */
if (lowest_affinity_level > PSCI_CPU_PWR_LVL)
diff --git a/lib/psci/psci_off.c b/lib/psci/psci_off.c
index 8be44c3..e7fb653 100644
--- a/lib/psci/psci_off.c
+++ b/lib/psci/psci_off.c
@@ -19,7 +19,7 @@
******************************************************************************/
static void psci_set_power_off_state(psci_power_state_t *state_info)
{
- int lvl;
+ unsigned int lvl;
for (lvl = PSCI_CPU_PWR_LVL; lvl <= PLAT_MAX_PWR_LVL; lvl++)
state_info->pwr_domain_state[lvl] = PLAT_MAX_OFF_STATE;
diff --git a/lib/xlat_tables_v2/xlat_tables_internal.c b/lib/xlat_tables_v2/xlat_tables_internal.c
index 2d556e6..e1a252b 100644
--- a/lib/xlat_tables_v2/xlat_tables_internal.c
+++ b/lib/xlat_tables_v2/xlat_tables_internal.c
@@ -37,7 +37,7 @@
*/
static int xlat_table_get_index(xlat_ctx_t *ctx, const uint64_t *table)
{
- for (int i = 0; i < ctx->tables_num; i++)
+ for (unsigned int i = 0; i < ctx->tables_num; i++)
if (ctx->tables[i] == table)
return i;
@@ -53,7 +53,7 @@
/* Returns a pointer to an empty translation table. */
static uint64_t *xlat_table_get_empty(xlat_ctx_t *ctx)
{
- for (int i = 0; i < ctx->tables_num; i++)
+ for (unsigned int i = 0; i < ctx->tables_num; i++)
if (ctx->tables_mapped_regions[i] == 0)
return ctx->tables[i];
@@ -203,7 +203,7 @@
const uintptr_t table_base_va,
uint64_t *const table_base,
const int table_entries,
- const int level)
+ const unsigned int level)
{
assert(level >= ctx->base_level && level <= XLAT_TABLE_LEVEL_MAX);
@@ -468,7 +468,7 @@
const uintptr_t table_base_va,
uint64_t *const table_base,
const int table_entries,
- const int level)
+ const unsigned int level)
{
assert(level >= ctx->base_level && level <= XLAT_TABLE_LEVEL_MAX);
@@ -1053,14 +1053,14 @@
/* All tables must be zeroed before mapping any region. */
- for (int i = 0; i < ctx->base_table_entries; i++)
+ for (unsigned int i = 0; i < ctx->base_table_entries; i++)
ctx->base_table[i] = INVALID_DESC;
- for (int j = 0; j < ctx->tables_num; j++) {
+ for (unsigned int j = 0; j < ctx->tables_num; j++) {
#if PLAT_XLAT_TABLES_DYNAMIC
ctx->tables_mapped_regions[j] = 0;
#endif
- for (int i = 0; i < XLAT_TABLE_ENTRIES; i++)
+ for (unsigned int i = 0; i < XLAT_TABLE_ENTRIES; i++)
ctx->tables[j][i] = INVALID_DESC;
}
diff --git a/lib/xlat_tables_v2/xlat_tables_private.h b/lib/xlat_tables_v2/xlat_tables_private.h
index 7b3e555..83e0b6e 100644
--- a/lib/xlat_tables_v2/xlat_tables_private.h
+++ b/lib/xlat_tables_v2/xlat_tables_private.h
@@ -52,7 +52,7 @@
* null entry.
*/
mmap_region_t *mmap;
- int mmap_num;
+ unsigned int mmap_num;
/*
* Array of finer-grain translation tables.
@@ -60,7 +60,7 @@
* contain both level-2 and level-3 entries.
*/
uint64_t (*tables)[XLAT_TABLE_ENTRIES];
- int tables_num;
+ unsigned int tables_num;
/*
* Keep track of how many regions are mapped in each table. The base
* table can't be unmapped so it isn't needed to keep track of it.
@@ -69,14 +69,14 @@
int *tables_mapped_regions;
#endif /* PLAT_XLAT_TABLES_DYNAMIC */
- int next_table;
+ unsigned int next_table;
/*
* Base translation table. It doesn't need to have the same amount of
* entries as the ones used for other levels.
*/
uint64_t *base_table;
- int base_table_entries;
+ unsigned int base_table_entries;
/*
* Max Physical and Virtual addresses currently in use by the
@@ -87,10 +87,10 @@
uintptr_t max_va;
/* Level of the base translation table. */
- int base_level;
+ unsigned int base_level;
/* Set to 1 when the translation tables are initialized. */
- int initialized;
+ unsigned int initialized;
/*
* Bit mask that has to be ORed to the rest of a translation table
diff --git a/plat/nvidia/tegra/common/tegra_pm.c b/plat/nvidia/tegra/common/tegra_pm.c
index 9445019..6f841ef 100644
--- a/plat/nvidia/tegra/common/tegra_pm.c
+++ b/plat/nvidia/tegra/common/tegra_pm.c
@@ -107,7 +107,7 @@
void tegra_get_sys_suspend_power_state(psci_power_state_t *req_state)
{
/* all affinities use system suspend state id */
- for (int i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++)
+ for (uint32_t i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++)
req_state->pwr_domain_state[i] = PSTATE_ID_SOC_POWERDN;
}
diff --git a/plat/nvidia/tegra/platform.mk b/plat/nvidia/tegra/platform.mk
index f5af408..eaf1091 100644
--- a/plat/nvidia/tegra/platform.mk
+++ b/plat/nvidia/tegra/platform.mk
@@ -34,3 +34,6 @@
# modify BUILD_PLAT to point to SoC specific build directory
BUILD_PLAT := ${BUILD_BASE}/${PLAT}/${TARGET_SOC}/${BUILD_TYPE}
+
+# enable signed comparison checks
+CFLAGS += -Wsign-compare
diff --git a/plat/nvidia/tegra/soc/t132/plat_psci_handlers.c b/plat/nvidia/tegra/soc/t132/plat_psci_handlers.c
index 56ce91b..9b7dc85 100644
--- a/plat/nvidia/tegra/soc/t132/plat_psci_handlers.c
+++ b/plat/nvidia/tegra/soc/t132/plat_psci_handlers.c
@@ -49,7 +49,7 @@
}
/* Set lower power states to PLAT_MAX_OFF_STATE */
- for (int i = MPIDR_AFFLVL0; i < PLAT_MAX_PWR_LVL; i++)
+ for (uint32_t i = MPIDR_AFFLVL0; i < PLAT_MAX_PWR_LVL; i++)
req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE;
/* Set the SYSTEM_SUSPEND state-id */
diff --git a/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c b/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c
index 4765ba0..05b30fc 100644
--- a/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c
+++ b/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c
@@ -291,7 +291,7 @@
int ari_online_core(uint32_t ari_base, uint32_t core)
{
- int cpu = read_mpidr() & MPIDR_CPU_MASK;
+ uint32_t cpu = read_mpidr() & MPIDR_CPU_MASK;
int cluster = (read_mpidr() & MPIDR_CLUSTER_MASK) >>
MPIDR_AFFINITY_BITS;
int impl = (read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK;
@@ -300,7 +300,7 @@
cpu |= (cluster << 2);
/* sanity check target core id */
- if ((core >= MCE_CORE_ID_MAX) || (cpu == core)) {
+ if ((core >= (uint32_t)MCE_CORE_ID_MAX) || (cpu == core)) {
ERROR("%s: unsupported core id (%d)\n", __func__, core);
return EINVAL;
}
diff --git a/plat/nvidia/tegra/soc/t186/drivers/mce/nvg.c b/plat/nvidia/tegra/soc/t186/drivers/mce/nvg.c
index 0be1af1..8c6f67c 100644
--- a/plat/nvidia/tegra/soc/t186/drivers/mce/nvg.c
+++ b/plat/nvidia/tegra/soc/t186/drivers/mce/nvg.c
@@ -168,11 +168,11 @@
int nvg_online_core(uint32_t ari_base, uint32_t core)
{
- int cpu = read_mpidr() & MPIDR_CPU_MASK;
+ uint32_t cpu = read_mpidr() & MPIDR_CPU_MASK;
int impl = (read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK;
/* sanity check code id */
- if ((core >= MCE_CORE_ID_MAX) || (cpu == core)) {
+ if ((core >= (uint32_t)MCE_CORE_ID_MAX) || (cpu == core)) {
ERROR("%s: unsupported core id (%d)\n", __func__, core);
return EINVAL;
}
diff --git a/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c b/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
index 44b99dc..095614e 100644
--- a/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
+++ b/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
@@ -256,8 +256,8 @@
int tegra_soc_pwr_domain_on(u_register_t mpidr)
{
- int target_cpu = mpidr & MPIDR_CPU_MASK;
- int target_cluster = (mpidr & MPIDR_CLUSTER_MASK) >>
+ uint32_t target_cpu = mpidr & MPIDR_CPU_MASK;
+ uint32_t target_cluster = (mpidr & MPIDR_CLUSTER_MASK) >>
MPIDR_AFFINITY_BITS;
if (target_cluster > MPIDR_AFFLVL1) {
diff --git a/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c b/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c
index bcaade6..3dff653 100644
--- a/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c
+++ b/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c
@@ -60,7 +60,7 @@
/*
* System powerdown request only for afflvl 2
*/
- for (int i = MPIDR_AFFLVL0; i < PLAT_MAX_PWR_LVL; i++)
+ for (uint32_t i = MPIDR_AFFLVL0; i < PLAT_MAX_PWR_LVL; i++)
req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE;
req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] =
diff --git a/services/spd/tlkd/tlkd_main.c b/services/spd/tlkd/tlkd_main.c
index 2748868..948be5d 100644
--- a/services/spd/tlkd/tlkd_main.c
+++ b/services/spd/tlkd/tlkd_main.c
@@ -37,7 +37,7 @@
/*******************************************************************************
* CPU number on which TLK booted up
******************************************************************************/
-static int boot_cpu;
+static uint32_t boot_cpu;
/* TLK UID: RFC-4122 compliant UUID (version-5, sha-1) */
DEFINE_SVC_UUID(tlk_uuid,