tree 7097ffd887431334e220bb21d5492ad8f5eb5a6c
parent 64e41ba1ab32a00b5284db6f49cfccac86ce1171
author Amit Nagal <amit.nagal@amd.com> 1693320299 -1200
committer amit nagal <amit.nagal@amd.com> 1693466126 +0200

fix(xilinx): update dtb when dtb address and tf-a ddr flow is used

Memory reservation in dtb will be done only when TF-A runs from
ddr and dtb load address is provided.
Otherwise prepare_dtb will simply return.
Empty definition of prepare_dtb is removed.

Signed-off-by: Amit Nagal <amit.nagal@amd.com>
Change-Id: Ie8a3ec51d60a7389831cfe6a112f722777930623