feat(plat/st): use FCONF to configure platform
Add required code to support FCONF on STM32MP1 platform.
The new FW_CONFIG DT file will be inside the FIP, and loaded by BL2.
It will be used to configure the addresses where to load other binaries.
BL2 should be agnostic of which BL32 is in the FIP (OP-TEE or SP_min),
so optee_utils.c is always compiled, and some OP-TEE flags are removed.
Change-Id: Id957b49b0117864136250bfc416664f815043ada
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
diff --git a/plat/st/stm32mp1/stm32mp1_fip_def.h b/plat/st/stm32mp1/stm32mp1_fip_def.h
index 5b9a3cb..d8561dc 100644
--- a/plat/st/stm32mp1/stm32mp1_fip_def.h
+++ b/plat/st/stm32mp1/stm32mp1_fip_def.h
@@ -7,10 +7,14 @@
#ifndef STM32MP1_FIP_DEF_H
#define STM32MP1_FIP_DEF_H
+#define STM32MP_DDR_S_SIZE U(0x01E00000) /* 30 MB */
+#define STM32MP_DDR_SHMEM_SIZE U(0x00200000) /* 2 MB */
+
#define STM32MP_BL2_SIZE U(0x0001B000) /* 108 KB for BL2 */
#define STM32MP_BL2_DTB_SIZE U(0x00006000) /* 24 KB for DTB */
#define STM32MP_BL32_SIZE U(0x00019000) /* 100 KB for BL32 */
#define STM32MP_BL32_DTB_SIZE U(0x00005000) /* 20 KB for DTB */
+#define STM32MP_FW_CONFIG_MAX_SIZE PAGE_SIZE /* 4 KB for FCONF DTB */
#define STM32MP_HW_CONFIG_MAX_SIZE U(0x40000) /* 256 KB for HW config DTB */
#define STM32MP_BL2_BASE (STM32MP_SEC_SYSRAM_BASE + \
@@ -25,6 +29,7 @@
#define STM32MP_BL32_BASE (STM32MP_BL32_DTB_BASE + \
STM32MP_BL32_DTB_SIZE)
+
#if defined(IMAGE_BL2)
#define STM32MP_DTB_SIZE STM32MP_BL2_DTB_SIZE
#define STM32MP_DTB_BASE STM32MP_BL2_DTB_BASE
@@ -41,6 +46,9 @@
STM32MP_OPTEE_BASE)
#endif
+#define STM32MP_FW_CONFIG_BASE (STM32MP_SYSRAM_BASE + \
+ STM32MP_SYSRAM_SIZE - \
+ PAGE_SIZE)
#define STM32MP_HW_CONFIG_BASE (STM32MP_BL33_BASE + \
STM32MP_BL33_MAX_SIZE)