refactor(sgi): replace references to "SGI"/"sgi" for neoverse_rd
Currently, there are several reference to "SGI" or "sgi" in comments or
as macro prefix within the neoverse_rd directory. As part of the
migration to neoverse_rd, rename all occurences of "SGI/sgi" to
"Neoverse-RD" or the "NRD" prefix accordingly. All references in
comments are rephrased as "Neoverse RD platforms". References in code
are renamed as "NRD"/"nrd" accordingly.
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com>
Change-Id: Iec195427ff2bee565cb4a325a1a22892be95ae16
diff --git a/plat/arm/board/neoverse_rd/common/arch/aarch64/nrd_helper.S b/plat/arm/board/neoverse_rd/common/arch/aarch64/nrd_helper.S
index d250f3b..8d9c0d7 100644
--- a/plat/arm/board/neoverse_rd/common/arch/aarch64/nrd_helper.S
+++ b/plat/arm/board/neoverse_rd/common/arch/aarch64/nrd_helper.S
@@ -38,7 +38,7 @@
mov x4, x0
/*
- * The MT bit in MPIDR is always set for SGI platforms
+ * The MT bit in MPIDR is always set for Neoverse RD platforms
* and the affinity level 0 corresponds to thread affinity level.
*/
diff --git a/plat/arm/board/neoverse_rd/common/include/nrd_base_platform_def.h b/plat/arm/board/neoverse_rd/common/include/nrd_base_platform_def.h
index 5a68960..89fa924 100644
--- a/plat/arm/board/neoverse_rd/common/include/nrd_base_platform_def.h
+++ b/plat/arm/board/neoverse_rd/common/include/nrd_base_platform_def.h
@@ -246,10 +246,10 @@
#ifndef __ASSEMBLER__
/* SSC_VERSION related accessors */
/* Returns the part number of the platform */
-#define GET_SGI_PART_NUM \
+#define GET_NRD_PART_NUM \
GET_SSC_VERSION_PART_NUM(mmio_read_32(SSC_VERSION))
/* Returns the configuration number of the platform */
-#define GET_SGI_CONFIG_NUM \
+#define GET_NRD_CONFIG_NUM \
GET_SSC_VERSION_CONFIG(mmio_read_32(SSC_VERSION))
#endif /* __ASSEMBLER__ */
@@ -272,11 +272,11 @@
#define PLAT_ARM_SCMI_CHANNEL_COUNT NRD_CHIP_COUNT
/*
- * Mapping definition of the TrustZone Controller for ARM SGI/RD platforms
+ * Mapping definition of the TrustZone Controller for Arm Neoverse RD platforms
* where both the DRAM regions are marked for non-secure access. This applies
* to multi-chip platforms.
*/
-#define SGI_PLAT_TZC_NS_REMOTE_REGIONS_DEF(n) \
+#define NRD_PLAT_TZC_NS_REMOTE_REGIONS_DEF(n) \
{NRD_REMOTE_CHIP_MEM_OFFSET(n) + ARM_DRAM1_BASE, \
NRD_REMOTE_CHIP_MEM_OFFSET(n) + ARM_DRAM1_END, \
ARM_TZC_NS_DRAM_S_ACCESS, PLAT_ARM_TZC_NS_DEV_ACCESS}, \
diff --git a/plat/arm/board/neoverse_rd/common/include/nrd_plat.h b/plat/arm/board/neoverse_rd/common/include/nrd_plat.h
index ce5e16d..775f233 100644
--- a/plat/arm/board/neoverse_rd/common/include/nrd_plat.h
+++ b/plat/arm/board/neoverse_rd/common/include/nrd_plat.h
@@ -7,7 +7,7 @@
#ifndef NRD_PLAT_H
#define NRD_PLAT_H
-/* BL31 platform setup common to all SGI based platforms */
+/* BL31 platform setup common to all Neoverse RD platforms */
void nrd_bl31_common_platform_setup(void);
#endif /* NRD_PLAT_H */
diff --git a/plat/arm/board/neoverse_rd/common/include/nrd_ras.h b/plat/arm/board/neoverse_rd/common/include/nrd_ras.h
index 86192ff..768689c 100644
--- a/plat/arm/board/neoverse_rd/common/include/nrd_ras.h
+++ b/plat/arm/board/neoverse_rd/common/include/nrd_ras.h
@@ -12,11 +12,11 @@
/*
* Interrupt type supported.
- * - SGI_RAS_INTR_TYPE_SPI: Denotes a SPI interrupt
- * - SGI_RAS_INTR_TYPE_PPI: Denotes a PPI interrupt
+ * - NRD_RAS_INTR_TYPE_SPI: Denotes a SPI interrupt
+ * - NRD_RAS_INTR_TYPE_PPI: Denotes a PPI interrupt
*/
-#define SGI_RAS_INTR_TYPE_SPI 0
-#define SGI_RAS_INTR_TYPE_PPI 1
+#define NRD_RAS_INTR_TYPE_SPI 0
+#define NRD_RAS_INTR_TYPE_PPI 1
/*
* MM Communicate information structure. Required to generate MM Communicate
diff --git a/plat/arm/board/neoverse_rd/common/include/nrd_sdei.h b/plat/arm/board/neoverse_rd/common/include/nrd_sdei.h
index 81bd513..f1b6015 100644
--- a/plat/arm/board/neoverse_rd/common/include/nrd_sdei.h
+++ b/plat/arm/board/neoverse_rd/common/include/nrd_sdei.h
@@ -10,13 +10,13 @@
#if SDEI_SUPPORT
/* ARM SDEI dynamic shared event numbers */
-#define SGI_SDEI_DS_EVENT_0 U(804)
-#define SGI_SDEI_DS_EVENT_1 U(805)
+#define NRD_SDEI_DS_EVENT_0 U(804)
+#define NRD_SDEI_DS_EVENT_1 U(805)
#define PLAT_ARM_PRIVATE_SDEI_EVENTS \
SDEI_DEFINE_EVENT_0(ARM_SDEI_SGI), \
- SDEI_EXPLICIT_EVENT(SGI_SDEI_DS_EVENT_0, SDEI_MAPF_CRITICAL), \
- SDEI_EXPLICIT_EVENT(SGI_SDEI_DS_EVENT_1, SDEI_MAPF_CRITICAL),
+ SDEI_EXPLICIT_EVENT(NRD_SDEI_DS_EVENT_0, SDEI_MAPF_CRITICAL), \
+ SDEI_EXPLICIT_EVENT(NRD_SDEI_DS_EVENT_1, SDEI_MAPF_CRITICAL),
#define PLAT_ARM_SHARED_SDEI_EVENTS
diff --git a/plat/arm/board/neoverse_rd/common/include/nrd_soc_css_def_v2.h b/plat/arm/board/neoverse_rd/common/include/nrd_soc_css_def_v2.h
index c4e377b..33f9b4b 100644
--- a/plat/arm/board/neoverse_rd/common/include/nrd_soc_css_def_v2.h
+++ b/plat/arm/board/neoverse_rd/common/include/nrd_soc_css_def_v2.h
@@ -156,7 +156,7 @@
V2M_FLASH0_SIZE, \
MT_RO_DATA | MT_SECURE)
-#define SGI_MAP_FLASH0_RO MAP_REGION_FLAT(V2M_FLASH0_BASE,\
+#define NRD_MAP_FLASH0_RO MAP_REGION_FLAT(V2M_FLASH0_BASE,\
V2M_FLASH0_SIZE, \
MT_DEVICE | MT_RO | MT_SECURE)
diff --git a/plat/arm/board/neoverse_rd/common/include/nrd_variant.h b/plat/arm/board/neoverse_rd/common/include/nrd_variant.h
index b2ac2ac..94f80c3 100644
--- a/plat/arm/board/neoverse_rd/common/include/nrd_variant.h
+++ b/plat/arm/board/neoverse_rd/common/include/nrd_variant.h
@@ -28,7 +28,7 @@
#define RD_V2_SID_VER_PART_NUM 0x07F2
#define RD_V2_CONFIG_ID 0x1
-/* Structure containing SGI platform variant information */
+/* Structure containing Neoverse RD platform variant information */
typedef struct nrd_platform_info {
unsigned int platform_id; /* Part Number of the platform */
unsigned int config_id; /* Config Id of the platform */
diff --git a/plat/arm/board/neoverse_rd/common/nrd_plat.c b/plat/arm/board/neoverse_rd/common/nrd_plat.c
index f2fd215..0c59271 100644
--- a/plat/arm/board/neoverse_rd/common/nrd_plat.c
+++ b/plat/arm/board/neoverse_rd/common/nrd_plat.c
@@ -23,7 +23,7 @@
#include <services/spm_mm_partition.h>
#endif
-#define SGI_MAP_FLASH0_RO MAP_REGION_FLAT(V2M_FLASH0_BASE,\
+#define NRD_MAP_FLASH0_RO MAP_REGION_FLAT(V2M_FLASH0_BASE,\
V2M_FLASH0_SIZE, \
MT_DEVICE | MT_RO | MT_SECURE)
/*
@@ -36,7 +36,7 @@
#if IMAGE_BL1
const mmap_region_t plat_arm_mmap[] = {
ARM_MAP_SHARED_RAM,
- SGI_MAP_FLASH0_RO,
+ NRD_MAP_FLASH0_RO,
NRD_MAP_DEVICE,
SOC_CSS_MAP_DEVICE,
{0}
@@ -45,7 +45,7 @@
#if IMAGE_BL2
const mmap_region_t plat_arm_mmap[] = {
ARM_MAP_SHARED_RAM,
- SGI_MAP_FLASH0_RO,
+ NRD_MAP_FLASH0_RO,
#ifdef PLAT_ARM_MEM_PROT_ADDR
ARM_V2M_MAP_MEM_PROTECT,
#endif
diff --git a/plat/arm/board/neoverse_rd/common/nrd_plat_v2.c b/plat/arm/board/neoverse_rd/common/nrd_plat_v2.c
index b39c8f0..67f486e 100644
--- a/plat/arm/board/neoverse_rd/common/nrd_plat_v2.c
+++ b/plat/arm/board/neoverse_rd/common/nrd_plat_v2.c
@@ -24,7 +24,7 @@
#if IMAGE_BL1
const mmap_region_t plat_arm_mmap[] = {
ARM_MAP_SHARED_RAM,
- SGI_MAP_FLASH0_RO,
+ NRD_MAP_FLASH0_RO,
NRD_MAP_DEVICE,
SOC_PLATFORM_PERIPH_MAP_DEVICE,
SOC_SYSTEM_PERIPH_MAP_DEVICE,
@@ -35,7 +35,7 @@
#if IMAGE_BL2
const mmap_region_t plat_arm_mmap[] = {
ARM_MAP_SHARED_RAM,
- SGI_MAP_FLASH0_RO,
+ NRD_MAP_FLASH0_RO,
#ifdef PLAT_ARM_MEM_PROT_ADDR
ARM_V2M_MAP_MEM_PROTECT,
#endif
diff --git a/plat/arm/board/neoverse_rd/common/nrd_topology.c b/plat/arm/board/neoverse_rd/common/nrd_topology.c
index 9113bd8..ff04b2b 100644
--- a/plat/arm/board/neoverse_rd/common/nrd_topology.c
+++ b/plat/arm/board/neoverse_rd/common/nrd_topology.c
@@ -7,7 +7,7 @@
#include <plat/arm/common/plat_arm.h>
/*
- * Common topology related methods for SGI and RD based platforms
+ * Common topology related methods for Neoverse RD platforms
*/
/*******************************************************************************
* This function returns the core count within the cluster corresponding to
diff --git a/plat/arm/board/neoverse_rd/common/ras/nrd_ras_common.c b/plat/arm/board/neoverse_rd/common/ras/nrd_ras_common.c
index 85d927d..24f4506 100644
--- a/plat/arm/board/neoverse_rd/common/ras/nrd_ras_common.c
+++ b/plat/arm/board/neoverse_rd/common/ras/nrd_ras_common.c
@@ -54,7 +54,7 @@
plat_ic_clear_interrupt_pending(intr);
/* Routing mode option available only for SPI interrupts */
- if (intr_type == SGI_RAS_INTR_TYPE_SPI) {
+ if (intr_type == NRD_RAS_INTR_TYPE_SPI) {
plat_ic_set_spi_routing(intr, INTR_ROUTING_MODE_ANY,
(u_register_t)read_mpidr_el1());
}
@@ -75,7 +75,7 @@
/* Check if parameter is valid. */
if (config == NULL) {
- ERROR("SGI: Failed to register RAS config\n");
+ ERROR("NRD: Failed to register RAS config\n");
return -1;
}
@@ -93,7 +93,7 @@
map++;
}
- INFO("SGI: Platform RAS setup successful\n");
+ INFO("NRD: Platform RAS setup successful\n");
return 0;
}
diff --git a/plat/arm/board/neoverse_rd/common/ras/nrd_ras_cpu.c b/plat/arm/board/neoverse_rd/common/ras/nrd_ras_cpu.c
index d25fa7c..7f1c376 100644
--- a/plat/arm/board/neoverse_rd/common/ras/nrd_ras_cpu.c
+++ b/plat/arm/board/neoverse_rd/common/ras/nrd_ras_cpu.c
@@ -188,7 +188,7 @@
*/
ras_map = nrd_find_ras_event_map_by_intr(intr);
if (ras_map == NULL) {
- ERROR("SGI: RAS error info for interrupt id: %d not found\n",
+ ERROR("NRD: RAS error info for interrupt id: %d not found\n",
intr);
return -1;
}
diff --git a/plat/arm/board/neoverse_rd/common/ras/nrd_ras_sram.c b/plat/arm/board/neoverse_rd/common/ras/nrd_ras_sram.c
index 95bc3a4..521efdf 100644
--- a/plat/arm/board/neoverse_rd/common/ras/nrd_ras_sram.c
+++ b/plat/arm/board/neoverse_rd/common/ras/nrd_ras_sram.c
@@ -52,7 +52,7 @@
cm_el1_sysregs_context_save(NON_SECURE);
intr = data->interrupt;
- INFO("SGI: Base element RAM interrupt [%d] handler\n", intr);
+ INFO("NRD: Base element RAM interrupt [%d] handler\n", intr);
/* Determine error record base address to read. */
base_addr = 0;
@@ -89,7 +89,7 @@
*/
ras_map = nrd_find_ras_event_map_by_intr(intr);
if (ras_map == NULL) {
- ERROR("SGI: RAS error info for interrupt id: %d not found\n",
+ ERROR("NRD: RAS error info for interrupt id: %d not found\n",
intr);
return -1;
}