commit 62e499bb8ae6d19e9fe2ab3dbb476d859178438e
author Biwen Li <biwen.li@nxp.com> Sun Jan 17 14:30:33 2021 +0800
committer Jiafei Pan <Jiafei.Pan@nxp.com> Sun Mar 27 23:24:24 2022 +0800
tree 17ddb7c7db8a12090a7c3de9df0a74dbbc629dc3
parent 68e24195b28b3e2665c4234be8fe36e5225c40ba

feat(nxp-gic): add some macros definition for gicv3

Add macros as follows,
    - GICD_ISENABLER_1
    - GICD_ISENABLER_3
    - GICD_ICENABLER_1
    - GICD_ICENABLER_3

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ia522ab4bc496d9a47613a49829b65db96e2b1279

include/drivers/nxp/gic/gicv3/plat_gic.h

diff --git a/include/drivers/nxp/gic/gicv3/plat_gic.h b/include/drivers/nxp/gic/gicv3/plat_gic.h
index f4e12de..0c0d0fc 100644
--- a/include/drivers/nxp/gic/gicv3/plat_gic.h
+++ b/include/drivers/nxp/gic/gicv3/plat_gic.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2021 NXP
+ * Copyright 2021-2022 NXP
  *
  * SPDX-License-Identifier: BSD-3-Clause
  *
@@ -21,8 +21,12 @@
 #define GICD_CTLR_OFFSET        0x0
 #define GICD_CLR_SPI_SR         0x58
 #define GICD_IGROUPR_2          0x88
+#define GICD_ISENABLER_1        0x104
+#define GICD_ICENABLER_1        0x184
 #define GICD_ISENABLER_2        0x108
 #define GICD_ICENABLER_2        0x188
+#define GICD_ISENABLER_3        0x10c
+#define GICD_ICENABLER_3        0x18c
 #define GICD_ICPENDR_2          0x288
 #define GICD_ICACTIVER_2        0x388
 #define GICD_IPRIORITYR_22      0x458
@@ -69,6 +73,9 @@
 #define GIC_IRM_SPI89           0x80000000
 
 #define GICD_IROUTER_VALUE      0x100
+#define GICD_ISENABLER_1_VALUE  0x10000000
+#define GICD_ISENABLER_2_VALUE  0x100
+#define GICD_ISENABLER_3_VALUE  0x20100
 #define GICR_WAKER_SLEEP_BIT    0x2
 #define GICR_WAKER_ASLEEP       (1 << 2 | 1 << 1)