commit 62d87e7bb2140223174d78e4183572840974b332
author Arvind Ram Prakash <arvind.ramprakash@arm.com> Thu Jun 06 11:33:37 2024 -0500
committer Arvind Ram Prakash <arvind.ramprakash@arm.com> Thu Jul 18 13:49:43 2024 -0500
tree 6bc3f38c908ac7725cdc70fc80eb38613c5f3dd4
parent 05b47635a54fe930bd87a2523de4a423a85fd263

feat(fgt2): add support for FEAT_FGT2

This patch disables trapping to EL3 when the FEAT_FGT2
specific trap registers are accessed by setting the
SCR_EL3.FGTEn2 bit

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I6d2b614affb9067b2bc3d7bf0ae7d169d031592a

changelog.yaml

diff --git a/changelog.yaml b/changelog.yaml
index e4a6883..c085ede 100644
--- a/changelog.yaml
+++ b/changelog.yaml
@@ -104,6 +104,9 @@
       - title: Extended Translation Control Register (FEAT_TCR2).
         scope: tcr2
 
+      - title: Fine-grained Traps 2 (FEAT_FGT2).
+        scope: fgt2
+
       - title: CPU feature / ID register handling in general
         scope: cpufeat