commit 62cc109a41827e2883cc21ce5ba917ab18ac3e47
author Olivier Deprez <olivier.deprez@arm.com> Wed May 24 17:42:00 2023 +0200
committer Olivier Deprez <olivier.deprez@arm.com> Fri Jun 16 15:03:36 2023 +0200
tree 5ad8e39e46838f4ee52140d49c52b1c80a0f35f6
parent 9ce1247d6d6bfefc96e7578e2278c51bfc85852c

fix: pass SMCCCv1.3 SVE hint to internal flags

This change fixes the initial support for SMCCCv1.3 SVE hint bit [1].
In the aarch64 smc handler, the FID[16] bit is improperly extracted
and results in the corresponding flags bit to be always set.
Fix by doing the proper masking and set into the flags register.

[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/17511

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I62b8e211d48a50f28e184ff27cd718f51d8d56bf

bl31/aarch64/runtime_exceptions.S

diff --git a/bl31/aarch64/runtime_exceptions.S b/bl31/aarch64/runtime_exceptions.S
index 8bcf94e..851ac47 100644
--- a/bl31/aarch64/runtime_exceptions.S
+++ b/bl31/aarch64/runtime_exceptions.S
@@ -519,7 +519,8 @@
 	 * flags using the appropriate helper.
 	 */
 2:
-	bfi	x7, x0, #FUNCID_SVE_HINT_SHIFT, #FUNCID_SVE_HINT_MASK
+	and	x16, x0, #(FUNCID_SVE_HINT_MASK << FUNCID_SVE_HINT_SHIFT)
+	orr	x7, x7, x16
 	bic	x0, x0, #(FUNCID_SVE_HINT_MASK << FUNCID_SVE_HINT_SHIFT)
 
 	/* Get the unique owning entity number */