Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are
reserved. This means they can't be used in header guards.
The style that this project is now to use the full name of the file in
capital letters followed by 'H'. For example, for a file called
"uart_example.h", the header guard is UART_EXAMPLE_H.
The exceptions are files that are imported from other projects:
- CryptoCell driver
- dt-bindings folders
- zlib headers
Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
diff --git a/plat/nvidia/tegra/include/drivers/flowctrl.h b/plat/nvidia/tegra/include/drivers/flowctrl.h
index 2e3bcf0..d604c97 100644
--- a/plat/nvidia/tegra/include/drivers/flowctrl.h
+++ b/plat/nvidia/tegra/include/drivers/flowctrl.h
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __FLOWCTRL_H__
-#define __FLOWCTRL_H__
+#ifndef FLOWCTRL_H
+#define FLOWCTRL_H
#include <mmio.h>
#include <tegra_def.h>
@@ -58,4 +58,4 @@
void tegra_fc_lock_active_cluster(void);
void tegra_fc_reset_bpmp(void);
-#endif /* __FLOWCTRL_H__ */
+#endif /* FLOWCTRL_H */
diff --git a/plat/nvidia/tegra/include/drivers/mce.h b/plat/nvidia/tegra/include/drivers/mce.h
index c7867a5..8140870 100644
--- a/plat/nvidia/tegra/include/drivers/mce.h
+++ b/plat/nvidia/tegra/include/drivers/mce.h
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MCE_H__
-#define __MCE_H__
+#ifndef MCE_H
+#define MCE_H
#include <mmio.h>
#include <tegra_def.h>
@@ -73,4 +73,4 @@
void mce_update_cstate_info(const mce_cstate_info_t *cstate);
void mce_verify_firmware_version(void);
-#endif /* __MCE_H__ */
+#endif /* MCE_H */
diff --git a/plat/nvidia/tegra/include/drivers/memctrl.h b/plat/nvidia/tegra/include/drivers/memctrl.h
index 8413299..17427cb 100644
--- a/plat/nvidia/tegra/include/drivers/memctrl.h
+++ b/plat/nvidia/tegra/include/drivers/memctrl.h
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MEMCTRL_H__
-#define __MEMCTRL_H__
+#ifndef MEMCTRL_H
+#define MEMCTRL_H
void tegra_memctrl_setup(void);
void tegra_memctrl_restore_settings(void);
@@ -14,4 +14,4 @@
void tegra_memctrl_videomem_setup(uint64_t phys_base, uint32_t size_in_bytes);
void tegra_memctrl_disable_ahb_redirection(void);
-#endif /* __MEMCTRL_H__ */
+#endif /* MEMCTRL_H */
diff --git a/plat/nvidia/tegra/include/drivers/memctrl_v1.h b/plat/nvidia/tegra/include/drivers/memctrl_v1.h
index 78ee2e7..2553a1f 100644
--- a/plat/nvidia/tegra/include/drivers/memctrl_v1.h
+++ b/plat/nvidia/tegra/include/drivers/memctrl_v1.h
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MEMCTRLV1_H__
-#define __MEMCTRLV1_H__
+#ifndef MEMCTRL_V1_H
+#define MEMCTRL_V1_H
#include <mmio.h>
#include <tegra_def.h>
@@ -53,4 +53,4 @@
mmio_write_32(TEGRA_MC_BASE + off, val);
}
-#endif /* __MEMCTRLV1_H__ */
+#endif /* MEMCTRL_V1_H */
diff --git a/plat/nvidia/tegra/include/drivers/memctrl_v2.h b/plat/nvidia/tegra/include/drivers/memctrl_v2.h
index b72653e..9ae4302 100644
--- a/plat/nvidia/tegra/include/drivers/memctrl_v2.h
+++ b/plat/nvidia/tegra/include/drivers/memctrl_v2.h
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MEMCTRLV2_H__
-#define __MEMCTRLV2_H__
+#ifndef MEMCTRL_V2_H
+#define MEMCTRL_V2_H
#include <tegra_def.h>
@@ -475,4 +475,4 @@
#endif /* __ASSMEBLY__ */
-#endif /* __MEMCTRLV2_H__ */
+#endif /* MEMCTRL_V2_H */
diff --git a/plat/nvidia/tegra/include/drivers/pmc.h b/plat/nvidia/tegra/include/drivers/pmc.h
index ea9392b..14c9225 100644
--- a/plat/nvidia/tegra/include/drivers/pmc.h
+++ b/plat/nvidia/tegra/include/drivers/pmc.h
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PMC_H__
-#define __PMC_H__
+#ifndef PMC_H
+#define PMC_H
#include <mmio.h>
#include <tegra_def.h>
@@ -40,4 +40,4 @@
void tegra_pmc_cpu_on(int32_t cpu);
__dead2 void tegra_pmc_system_reset(void);
-#endif /* __PMC_H__ */
+#endif /* PMC_H */
diff --git a/plat/nvidia/tegra/include/drivers/smmu.h b/plat/nvidia/tegra/include/drivers/smmu.h
index 86e911a..974aa35 100644
--- a/plat/nvidia/tegra/include/drivers/smmu.h
+++ b/plat/nvidia/tegra/include/drivers/smmu.h
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SMMU_H
-#define __SMMU_H
+#ifndef SMMU_H
+#define SMMU_H
#include <memctrl_v2.h>
#include <mmio.h>
@@ -705,4 +705,4 @@
void tegra_smmu_save_context(uint64_t smmu_ctx_addr);
smmu_regs_t *plat_get_smmu_ctx(void);
-#endif /*__SMMU_H */
+#endif /* SMMU_H */
diff --git a/plat/nvidia/tegra/include/plat_macros.S b/plat/nvidia/tegra/include/plat_macros.S
index caf1148..14e7d8a 100644
--- a/plat/nvidia/tegra/include/plat_macros.S
+++ b/plat/nvidia/tegra/include/plat_macros.S
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_MACROS_S__
-#define __PLAT_MACROS_S__
+#ifndef PLAT_MACROS_S
+#define PLAT_MACROS_S
#include <tegra_def.h>
@@ -57,4 +57,4 @@
1:
.endm
-#endif /* __PLAT_MACROS_S__ */
+#endif /* PLAT_MACROS_S */
diff --git a/plat/nvidia/tegra/include/platform_def.h b/plat/nvidia/tegra/include/platform_def.h
index 4894442..6a507d4 100644
--- a/plat/nvidia/tegra/include/platform_def.h
+++ b/plat/nvidia/tegra/include/platform_def.h
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLATFORM_DEF_H__
-#define __PLATFORM_DEF_H__
+#ifndef PLATFORM_DEF_H
+#define PLATFORM_DEF_H
#include <arch.h>
#include <common_def.h>
@@ -65,4 +65,4 @@
#define CACHE_WRITEBACK_SHIFT 6
#define CACHE_WRITEBACK_GRANULE (U(1) << CACHE_WRITEBACK_SHIFT)
-#endif /* __PLATFORM_DEF_H__ */
+#endif /* PLATFORM_DEF_H */
diff --git a/plat/nvidia/tegra/include/t132/tegra_def.h b/plat/nvidia/tegra/include/t132/tegra_def.h
index ae00fb5..277f91b 100644
--- a/plat/nvidia/tegra/include/t132/tegra_def.h
+++ b/plat/nvidia/tegra/include/t132/tegra_def.h
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TEGRA_DEF_H__
-#define __TEGRA_DEF_H__
+#ifndef TEGRA_DEF_H
+#define TEGRA_DEF_H
#include <utils_def.h>
@@ -99,4 +99,4 @@
#define TEGRA_TZRAM_BASE U(0x7C010000)
#define TEGRA_TZRAM_SIZE U(0x10000)
-#endif /* __TEGRA_DEF_H__ */
+#endif /* TEGRA_DEF_H */
diff --git a/plat/nvidia/tegra/include/t186/tegra_def.h b/plat/nvidia/tegra/include/t186/tegra_def.h
index d033147..79aff59 100644
--- a/plat/nvidia/tegra/include/t186/tegra_def.h
+++ b/plat/nvidia/tegra/include/t186/tegra_def.h
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TEGRA_DEF_H__
-#define __TEGRA_DEF_H__
+#ifndef TEGRA_DEF_H
+#define TEGRA_DEF_H
#include <utils_def.h>
@@ -247,4 +247,4 @@
#define TEGRA_TZRAM_BASE U(0x30000000)
#define TEGRA_TZRAM_SIZE U(0x40000)
-#endif /* __TEGRA_DEF_H__ */
+#endif /* TEGRA_DEF_H */
diff --git a/plat/nvidia/tegra/include/t210/tegra_def.h b/plat/nvidia/tegra/include/t210/tegra_def.h
index 454c666..5d86224 100644
--- a/plat/nvidia/tegra/include/t210/tegra_def.h
+++ b/plat/nvidia/tegra/include/t210/tegra_def.h
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TEGRA_DEF_H__
-#define __TEGRA_DEF_H__
+#ifndef TEGRA_DEF_H
+#define TEGRA_DEF_H
#include <utils_def.h>
@@ -124,4 +124,4 @@
#define TEGRA_TZRAM_BASE U(0x7C010000)
#define TEGRA_TZRAM_SIZE U(0x10000)
-#endif /* __TEGRA_DEF_H__ */
+#endif /* TEGRA_DEF_H */
diff --git a/plat/nvidia/tegra/include/tegra_platform.h b/plat/nvidia/tegra/include/tegra_platform.h
index db79fbe..63a0e01 100644
--- a/plat/nvidia/tegra/include/tegra_platform.h
+++ b/plat/nvidia/tegra/include/tegra_platform.h
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TEGRA_PLATFORM_H__
-#define __TEGRA_PLATFORM_H__
+#ifndef TEGRA_PLATFORM_H
+#define TEGRA_PLATFORM_H
#include <cdefs.h>
@@ -31,4 +31,4 @@
uint8_t tegra_platform_is_emulation(void);
uint8_t tegra_platform_is_fpga(void);
-#endif /* __TEGRA_PLATFORM_H__ */
+#endif /* TEGRA_PLATFORM_H */
diff --git a/plat/nvidia/tegra/include/tegra_private.h b/plat/nvidia/tegra/include/tegra_private.h
index b6f2df7..c4c277e 100644
--- a/plat/nvidia/tegra/include/tegra_private.h
+++ b/plat/nvidia/tegra/include/tegra_private.h
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __TEGRA_PRIVATE_H__
-#define __TEGRA_PRIVATE_H__
+#ifndef TEGRA_PRIVATE_H
+#define TEGRA_PRIVATE_H
#include <arch.h>
#include <platform_def.h>
@@ -112,4 +112,4 @@
void tegra_secure_entrypoint(void);
void tegra186_cpu_reset_handler(void);
-#endif /* __TEGRA_PRIVATE_H__ */
+#endif /* TEGRA_PRIVATE_H */
diff --git a/plat/nvidia/tegra/soc/t186/drivers/include/mce_private.h b/plat/nvidia/tegra/soc/t186/drivers/include/mce_private.h
index 26197e9..27baab6 100644
--- a/plat/nvidia/tegra/soc/t186/drivers/include/mce_private.h
+++ b/plat/nvidia/tegra/soc/t186/drivers/include/mce_private.h
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __MCE_PRIVATE_H__
-#define __MCE_PRIVATE_H__
+#ifndef MCE_PRIVATE_H
+#define MCE_PRIVATE_H
#include <mmio.h>
#include <tegra_def.h>
@@ -258,4 +258,4 @@
extern void nvg_set_request_data(uint64_t req, uint64_t data);
extern void nvg_set_request(uint64_t req);
extern uint64_t nvg_get_result(void);
-#endif /* __MCE_PRIVATE_H__ */
+#endif /* MCE_PRIVATE_H */
diff --git a/plat/nvidia/tegra/soc/t186/drivers/include/t18x_ari.h b/plat/nvidia/tegra/soc/t186/drivers/include/t18x_ari.h
index 8c6f30c..ecfb3f4 100644
--- a/plat/nvidia/tegra/soc/t186/drivers/include/t18x_ari.h
+++ b/plat/nvidia/tegra/soc/t186/drivers/include/t18x_ari.h
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef T18X_TEGRA_ARI_H
-#define T18X_TEGRA_ARI_H
+#ifndef T18X_ARI_H
+#define T18X_ARI_H
/*
* ----------------------------------------------------------------------------
@@ -434,4 +434,4 @@
TEGRA_NVG_CHANNEL_LAST_INDEX,
} tegra_nvg_channel_id_t;
-#endif /* T18X_TEGRA_ARI_H */
+#endif /* T18X_ARI_H */