diff --git a/include/bl31/cm_macros.S b/include/bl31/cm_macros.S
index e82f3a3..f12f8c3 100644
--- a/include/bl31/cm_macros.S
+++ b/include/bl31/cm_macros.S
@@ -30,12 +30,6 @@
 #include <arch.h>
 #include <context.h>
 
-	.macro	switch_to_exception_stack reg1 reg2
-	mov     \reg1 , sp
-	ldr	\reg2, [\reg1, #CTX_EL3STATE_OFFSET + CTX_EXCEPTION_SP]
-	mov	sp, \reg2
-	.endm
-
 	/* -----------------------------------------------------
 	 * Handle SMC exceptions seperately from other sync.
 	 * exceptions.
@@ -54,45 +48,10 @@
 
 	/* -----------------------------------------------------
 	 * The following code handles any synchronous exception
-	 * that is not an SMC. SP_EL3 is pointing to a context
-	 * structure where all the scratch registers are saved.
-	 * An exception stack is also retrieved from the context
-	 * Currently, a register dump is printed since BL31 does
-	 * not expect any such exceptions.
+	 * that is not an SMC.
 	 * -----------------------------------------------------
 	 */
-	bl	save_gp_registers
-	switch_to_exception_stack x0 x1
-
-	/* Save the core_context pointer for handled faults */
-	stp	x0, xzr, [sp, #-0x10]!
-	bl	fault_handler
-	ldp	x0, xzr, [sp], #0x10
-
-	mov	sp, x0
-	bl	restore_gp_registers
-	ldr	x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
-	eret
-	.endm
-
-	/* -----------------------------------------------------
-	 * Use a platform defined mechanism to report an async.
-	 * exception.
-	 * -----------------------------------------------------
-	 */
-	.macro	handle_async_exception type
-	str	x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
-	bl	save_gp_registers
-	switch_to_exception_stack x0 x1
-
-	/* Save the core_context pointer */
-	stp	x0, xzr, [sp, #-0x10]!
-	mov	x0, \type
-	bl	plat_report_exception
-	ldp	x0, xzr, [sp], #0x10
 
-	mov	sp, x0
-	bl	restore_gp_registers
-	ldr	x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
+	bl	dump_state_and_die
 	.endm
 
diff --git a/include/bl31/context.h b/include/bl31/context.h
index 549fa21..59c61da 100644
--- a/include/bl31/context.h
+++ b/include/bl31/context.h
@@ -76,7 +76,7 @@
  * 32-bits wide but are stored as 64-bit values for convenience
  ******************************************************************************/
 #define CTX_EL3STATE_OFFSET	(CTX_GPREGS_OFFSET + CTX_GPREGS_END)
-#define CTX_EXCEPTION_SP	0x0
+#define CTX_VBAR_EL3	0x0		/* Currently unused */
 #define CTX_RUNTIME_SP		0x8
 #define CTX_SPSR_EL3		0x10
 #define CTX_ELR_EL3		0x18
@@ -89,7 +89,7 @@
 #define CTX_TCR_EL3		0x50
 #define CTX_TTBR0_EL3		0x58
 #define CTX_DAIF_EL3		0x60
-#define CTX_VBAR_EL3		0x68	/* Currently unused */
+/* Unused space to honour alignment requirements */
 #define CTX_EL3STATE_END	0x70
 
 /*******************************************************************************
@@ -176,6 +176,11 @@
 #define CTX_FP_FPCR		0x208
 #define CTX_FPREGS_END		0x210
 
+/******************************************************************************
+ * Offsets for the per cpu cache implementation
+ ******************************************************************************/
+#define PTR_CACHE_CRASH_STACK_OFFSET 0x0
+
 #ifndef __ASSEMBLY__
 
 #include <cassert.h>
@@ -316,6 +321,18 @@
 void fpregs_context_save(fp_regs_t *regs);
 void fpregs_context_restore(fp_regs_t *regs);
 
+
+/* Per-CPU pointer cache of recently used pointers and also the crash stack
+ * TODO: Add other commonly used variables to this (tf_issues#90)
+ */
+typedef struct per_cpu_ptr_cache {
+	uint64_t crash_stack;
+} per_cpu_ptr_cache_t;
+
+CASSERT(PTR_CACHE_CRASH_STACK_OFFSET == __builtin_offsetof\
+	(per_cpu_ptr_cache_t, crash_stack), \
+	assert_per_cpu_ptr_cache_crash_stack_offset_mismatch);
+
 #undef CTX_SYSREG_ALL
 #undef CTX_FP_ALL
 #undef CTX_GPREG_ALL
diff --git a/include/bl31/context_mgmt.h b/include/bl31/context_mgmt.h
index efcdcd2..d2598ee 100644
--- a/include/bl31/context_mgmt.h
+++ b/include/bl31/context_mgmt.h
@@ -49,6 +49,8 @@
 		uint32_t spsr, uint32_t scr);
 extern void cm_set_el3_elr(uint32_t security_state, uint64_t entrypoint);
 extern void cm_set_next_eret_context(uint32_t security_state);
-extern void cm_init_exception_stack(uint64_t mpidr, uint32_t security_state);
+extern void cm_init_pcpu_ptr_cache();
+extern void cm_set_pcpu_ptr_cache(const void *pcpu_ptr);
+extern void *cm_get_pcpu_ptr_cache(void);
 
 #endif /* __CM_H__ */
diff --git a/include/bl31/runtime_svc.h b/include/bl31/runtime_svc.h
index 12b5db8..6d70896 100644
--- a/include/bl31/runtime_svc.h
+++ b/include/bl31/runtime_svc.h
@@ -262,8 +262,7 @@
 extern void runtime_svc_init();
 extern uint64_t __RT_SVC_DESCS_START__;
 extern uint64_t __RT_SVC_DESCS_END__;
-extern uint64_t get_exception_stack(uint64_t mpidr);
+extern uint64_t get_crash_stack(uint64_t mpidr);
 extern void runtime_exceptions(void);
-extern void fault_handler(void *handle);
 #endif /*__ASSEMBLY__*/
 #endif /* __RUNTIME_SVC_H__ */
diff --git a/include/common/debug.h b/include/common/debug.h
index e4fa31e..522b4df 100644
--- a/include/common/debug.h
+++ b/include/common/debug.h
@@ -56,11 +56,16 @@
 /* For the moment this Panic function is very basic, Report an error and
  * spin. This can be expanded in the future to provide more information.
  */
-static inline void __attribute__((noreturn)) panic(void)
-{
-	ERROR("PANIC\n");
-	while (1)
-		;
-}
+#if DEBUG
+extern void __dead2 do_panic(const char *file, int line);
+#define panic()	do_panic(__FILE__, __LINE__)
+
+#else
+extern void __dead2 do_panic(void);
+#define panic()	do_panic()
+
+#endif
+
+extern void print_string_value(char *s, unsigned long *mem);
 
 #endif /* __DEBUG_H__ */
diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h
index 67b452b..0a398d0 100644
--- a/include/lib/aarch64/arch_helpers.h
+++ b/include/lib/aarch64/arch_helpers.h
@@ -204,6 +204,8 @@
 extern unsigned int read_cntfrq_el0(void);
 extern unsigned long read_cnthctl_el2(void);
 
+extern unsigned long read_tpidr_el3(void);
+
 extern void write_scr(unsigned long);
 extern void write_hcr(unsigned long);
 extern void write_cpacr(unsigned long);
@@ -264,10 +266,13 @@
 extern void write_cptr_el2(unsigned long);
 extern void write_cptr_el3(unsigned long);
 
+extern void write_tpidr_el3(unsigned long);
+
 #define IS_IN_EL(x) \
 	(GET_EL(read_current_el()) == MODE_EL##x)
 
 #define IS_IN_EL1() IS_IN_EL(1)
 #define IS_IN_EL3() IS_IN_EL(3)
 
+
 #endif /* __ARCH_HELPERS_H__ */