tree 31bcca8282b67bb51dc8ed5d718cf0d874a65f2b
parent a61c330650beb71a87abef0e22392719078ab065
author Bipin Ravi <biprav01@u203721.austin.arm.com> 1710453141 -0500
committer Govindraj Raja <govindraj.raja@arm.com> 1711141807 -0500

fix(cpus): workaround for Cortex-A720 erratum 2926083

Cortex-A720 erratum 2926083 is a Cat B erratum that is present
in revisions r0p0, r0p1 and is fixed in r0p2. The errata is only
present when SPE (Statistical Profiling Extension) is implemented
and enabled.

The workaround is to set bits[58:57] of the CPUACTLR_EL1 to 'b11
when SPE is "implemented and enabled".

SDEN documentation:
https://developer.arm.com/documentation/SDEN2439421/latest

Change-Id: I30182c3893416af65b55fca9a913cb4512430434
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>