Merge pull request #1720 from jeenu-arm/gic-priority
GIC: Remove lowest priority constants
diff --git a/Makefile b/Makefile
index 2d01648..9525d41 100644
--- a/Makefile
+++ b/Makefile
@@ -188,8 +188,50 @@
ASFLAGS_aarch32 = $(march32-directive)
ASFLAGS_aarch64 = -march=armv8-a
+WARNING1 := -Wextra
+WARNING1 += -Wunused -Wno-unused-parameter
+WARNING1 += -Wmissing-declarations
+WARNING1 += -Wmissing-format-attribute
+WARNING1 += -Wmissing-prototypes
+WARNING1 += -Wold-style-definition
+WARNING1 += -Wunused-but-set-variable
+WARNING1 += -Wunused-const-variable
+
+WARNING2 := -Waggregate-return
+WARNING2 += -Wcast-align
+WARNING2 += -Wdisabled-optimization
+WARNING2 += -Wnested-externs
+WARNING2 += -Wshadow
+WARNING2 += -Wlogical-op
+WARNING2 += -Wmissing-field-initializers
+WARNING2 += -Wsign-compare
+WARNING2 += -Wmaybe-uninitialized
+
+WARNING3 := -Wbad-function-cast
+WARNING3 += -Wcast-qual
+WARNING3 += -Wconversion
+WARNING3 += -Wpacked
+WARNING3 += -Wpadded
+WARNING3 += -Wpointer-arith
+WARNING3 += -Wredundant-decls
+WARNING3 += -Wswitch-default
+WARNING3 += -Wpacked-bitfield-compat
+WARNING3 += -Wvla
+
+ifeq (${W},1)
+WARNINGS := $(WARNING1)
+else ifeq (${W},2)
+WARNINGS := $(WARNING1) $(WARNING2)
+else ifeq (${W},3)
+WARNINGS := $(WARNING1) $(WARNING2) $(WARNING3)
+endif
+
+ifneq (${E},0)
+ERRORS := -Werror
+endif
+
CPPFLAGS = ${DEFINES} ${INCLUDES} ${MBEDTLS_INC} -nostdinc \
- -Wmissing-include-dirs -Werror
+ -Wmissing-include-dirs $(ERRORS) $(WARNINGS)
ASFLAGS += $(CPPFLAGS) $(ASFLAGS_$(ARCH)) \
-D__ASSEMBLY__ -ffreestanding \
-Wa,--fatal-warnings
diff --git a/bl2/aarch32/bl2_arch_setup.c b/bl2/aarch32/bl2_arch_setup.c
index db8a068..4fd8d07 100644
--- a/bl2/aarch32/bl2_arch_setup.c
+++ b/bl2/aarch32/bl2_arch_setup.c
@@ -4,6 +4,7 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
+#include "../bl2_private.h"
/*******************************************************************************
* Place holder function to perform any Secure SVC specific architectural
diff --git a/bl2/bl2_private.h b/bl2/bl2_private.h
index 7fd17bf..01f6c6b 100644
--- a/bl2/bl2_private.h
+++ b/bl2/bl2_private.h
@@ -8,6 +8,9 @@
#define BL2_PRIVATE_H
#if BL2_IN_XIP_MEM
+
+#include <stdint.h>
+
/*******************************************************************************
* Declarations of linker defined symbols which will tell us where BL2 lives
* in Trusted ROM and RAM
diff --git a/bl31/bl31.ld.S b/bl31/bl31.ld.S
index 43d0ed4..fd53ed8 100644
--- a/bl31/bl31.ld.S
+++ b/bl31/bl31.ld.S
@@ -66,11 +66,11 @@
__CPU_OPS_END__ = .;
/*
- * Keep the .got section in the RO section as the it is patched
+ * Keep the .got section in the RO section as it is patched
* prior to enabling the MMU and having the .got in RO is better for
- * security.
+ * security. GOT is a table of addresses so ensure 8-byte alignment.
*/
- . = ALIGN(16);
+ . = ALIGN(8);
__GOT_START__ = .;
*(.got)
__GOT_END__ = .;
@@ -112,6 +112,16 @@
KEEP(*(cpu_ops))
__CPU_OPS_END__ = .;
+ /*
+ * Keep the .got section in the RO section as it is patched
+ * prior to enabling the MMU and having the .got in RO is better for
+ * security. GOT is a table of addresses so ensure 8-byte alignment.
+ */
+ . = ALIGN(8);
+ __GOT_START__ = .;
+ *(.got)
+ __GOT_END__ = .;
+
/* Place pubsub sections for events */
. = ALIGN(8);
#include <pubsub_events.h>
@@ -165,11 +175,12 @@
__DATA_END__ = .;
} >RAM
- . = ALIGN(16);
/*
* .rela.dyn needs to come after .data for the read-elf utility to parse
- * this section correctly.
+ * this section correctly. Ensure 8-byte alignment so that the fields of
+ * RELA data structure are aligned.
*/
+ . = ALIGN(8);
__RELA_START__ = .;
.rela.dyn . : {
} >RAM
diff --git a/docs/marvell/build.txt b/docs/marvell/build.txt
index 0682b77..a00dbb5 100644
--- a/docs/marvell/build.txt
+++ b/docs/marvell/build.txt
@@ -167,7 +167,7 @@
(1) ARM cross compiler capable of building images for the service CPU (CM3).
This component is usually included in the Linux host packages.
- On Debian/Uboot hosts the default GNU ARM tool chain can be installed
+ On Debian/Ubuntu hosts the default GNU ARM tool chain can be installed
using the following command::
> sudo apt-get install gcc-arm-linux-gnueabi
diff --git a/docs/user-guide.rst b/docs/user-guide.rst
index a8bd40c..103f1c7 100644
--- a/docs/user-guide.rst
+++ b/docs/user-guide.rst
@@ -1875,16 +1875,16 @@
-C cluster0.NUM_CORES=4 \
-C cluster1.NUM_CORES=4 \
-C cache_state_modelled=1 \
- -C cluster0.cpu0.RVBAR=0x04020000 \
- -C cluster0.cpu1.RVBAR=0x04020000 \
- -C cluster0.cpu2.RVBAR=0x04020000 \
- -C cluster0.cpu3.RVBAR=0x04020000 \
- -C cluster1.cpu0.RVBAR=0x04020000 \
- -C cluster1.cpu1.RVBAR=0x04020000 \
- -C cluster1.cpu2.RVBAR=0x04020000 \
- -C cluster1.cpu3.RVBAR=0x04020000 \
- --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04020000 \
- --data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04001000 \
+ -C cluster0.cpu0.RVBAR=0x04010000 \
+ -C cluster0.cpu1.RVBAR=0x04010000 \
+ -C cluster0.cpu2.RVBAR=0x04010000 \
+ -C cluster0.cpu3.RVBAR=0x04010000 \
+ -C cluster1.cpu0.RVBAR=0x04010000 \
+ -C cluster1.cpu1.RVBAR=0x04010000 \
+ -C cluster1.cpu2.RVBAR=0x04010000 \
+ -C cluster1.cpu3.RVBAR=0x04010000 \
+ --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04010000 \
+ --data cluster0.cpu0="<path-to>/<bl32-binary>"@0xff000000 \
--data cluster0.cpu0="<path-to>/<bl33-binary>"@0x88000000 \
--data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \
--data cluster0.cpu0="<path-to>/<kernel-binary>"@0x80080000 \
@@ -1892,6 +1892,9 @@
Notes:
+- Since Position Independent Executable (PIE) support is enabled for BL31
+ in this config, it can be loaded at any valid address for execution.
+
- Since a FIP is not loaded when using BL31 as reset entrypoint, the
``--data="<path-to><bl31|bl32|bl33-binary>"@<base-address-of-binary>``
parameter is needed to load the individual bootloader images in memory.
@@ -1932,14 +1935,14 @@
-C cluster1.cpu1.CONFIG64=0 \
-C cluster1.cpu2.CONFIG64=0 \
-C cluster1.cpu3.CONFIG64=0 \
- -C cluster0.cpu0.RVBAR=0x04001000 \
- -C cluster0.cpu1.RVBAR=0x04001000 \
- -C cluster0.cpu2.RVBAR=0x04001000 \
- -C cluster0.cpu3.RVBAR=0x04001000 \
- -C cluster1.cpu0.RVBAR=0x04001000 \
- -C cluster1.cpu1.RVBAR=0x04001000 \
- -C cluster1.cpu2.RVBAR=0x04001000 \
- -C cluster1.cpu3.RVBAR=0x04001000 \
+ -C cluster0.cpu0.RVBAR=0x04002000 \
+ -C cluster0.cpu1.RVBAR=0x04002000 \
+ -C cluster0.cpu2.RVBAR=0x04002000 \
+ -C cluster0.cpu3.RVBAR=0x04002000 \
+ -C cluster1.cpu0.RVBAR=0x04002000 \
+ -C cluster1.cpu1.RVBAR=0x04002000 \
+ -C cluster1.cpu2.RVBAR=0x04002000 \
+ -C cluster1.cpu3.RVBAR=0x04002000 \
--data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04002000 \
--data cluster0.cpu0="<path-to>/<bl33-binary>"@0x88000000 \
--data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \
@@ -1962,16 +1965,16 @@
-C bp.secure_memory=1 \
-C bp.tzc_400.diagnostics=1 \
-C cache_state_modelled=1 \
- -C cluster0.cpu0.RVBARADDR=0x04020000 \
- -C cluster0.cpu1.RVBARADDR=0x04020000 \
- -C cluster0.cpu2.RVBARADDR=0x04020000 \
- -C cluster0.cpu3.RVBARADDR=0x04020000 \
- -C cluster1.cpu0.RVBARADDR=0x04020000 \
- -C cluster1.cpu1.RVBARADDR=0x04020000 \
- -C cluster1.cpu2.RVBARADDR=0x04020000 \
- -C cluster1.cpu3.RVBARADDR=0x04020000 \
- --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04020000 \
- --data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04002000 \
+ -C cluster0.cpu0.RVBARADDR=0x04010000 \
+ -C cluster0.cpu1.RVBARADDR=0x04010000 \
+ -C cluster0.cpu2.RVBARADDR=0x04010000 \
+ -C cluster0.cpu3.RVBARADDR=0x04010000 \
+ -C cluster1.cpu0.RVBARADDR=0x04010000 \
+ -C cluster1.cpu1.RVBARADDR=0x04010000 \
+ -C cluster1.cpu2.RVBARADDR=0x04010000 \
+ -C cluster1.cpu3.RVBARADDR=0x04010000 \
+ --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04010000 \
+ --data cluster0.cpu0="<path-to>/<bl32-binary>"@0xff000000 \
--data cluster0.cpu0="<path-to>/<bl33-binary>"@0x88000000 \
--data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \
--data cluster0.cpu0="<path-to>/<kernel-binary>"@0x80080000 \
@@ -1990,10 +1993,10 @@
-C bp.secure_memory=1 \
-C bp.tzc_400.diagnostics=1 \
-C cache_state_modelled=1 \
- -C cluster0.cpu0.RVBARADDR=0x04001000 \
- -C cluster0.cpu1.RVBARADDR=0x04001000 \
- -C cluster0.cpu2.RVBARADDR=0x04001000 \
- -C cluster0.cpu3.RVBARADDR=0x04001000 \
+ -C cluster0.cpu0.RVBARADDR=0x04002000 \
+ -C cluster0.cpu1.RVBARADDR=0x04002000 \
+ -C cluster0.cpu2.RVBARADDR=0x04002000 \
+ -C cluster0.cpu3.RVBARADDR=0x04002000 \
--data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04002000 \
--data cluster0.cpu0="<path-to>/<bl33-binary>"@0x88000000 \
--data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \
diff --git a/drivers/arm/ccn/ccn.c b/drivers/arm/ccn/ccn.c
index 59a7576..d46e020 100644
--- a/drivers/arm/ccn/ccn.c
+++ b/drivers/arm/ccn/ccn.c
@@ -553,7 +553,14 @@
return REGION_ID_LIMIT;
}
- region_id += node_pos_in_map;
+ /*
+ * According to section 3.1.1 in CCN specification, region offset for
+ * the RN-I components is calculated as (128 + NodeID of RN-I).
+ */
+ if (node_type == NODE_TYPE_RNI)
+ region_id += node_id;
+ else
+ region_id += node_pos_in_map;
return region_id;
}
diff --git a/drivers/io/io_block.c b/drivers/io/io_block.c
index 8226554..ff13113 100644
--- a/drivers/io/io_block.c
+++ b/drivers/io/io_block.c
@@ -67,8 +67,10 @@
static int find_first_block_state(const io_block_dev_spec_t *dev_spec,
unsigned int *index_out)
{
+ unsigned int index;
int result = -ENOENT;
- for (int index = 0; index < MAX_IO_BLOCK_DEVICES; ++index) {
+
+ for (index = 0U; index < MAX_IO_BLOCK_DEVICES; ++index) {
/* dev_spec is used as identifier since it's unique */
if (state_pool[index].dev_spec == dev_spec) {
result = 0;
diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h
index cbac247..c5c10ab 100644
--- a/include/plat/arm/common/arm_def.h
+++ b/include/plat/arm/common/arm_def.h
@@ -407,12 +407,16 @@
#define BL31_LIMIT (ARM_AP_TZC_DRAM1_BASE + \
PLAT_ARM_MAX_BL31_SIZE)
#elif (RESET_TO_BL31)
+/* Ensure Position Independent support (PIE) is enabled for this config.*/
+# if !ENABLE_PIE
+# error "BL31 must be a PIE if RESET_TO_BL31=1."
+# endif
/*
- * Put BL31_BASE in the middle of the Trusted SRAM.
+ * Since this is PIE, we can define BL31_BASE to 0x0 since this macro is solely
+ * used for building BL31 when RESET_TO_BL31=1.
*/
-#define BL31_BASE (ARM_TRUSTED_SRAM_BASE + \
- (PLAT_ARM_TRUSTED_SRAM_SIZE >> 1))
-#define BL31_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)
+#define BL31_BASE 0x0
+#define BL31_LIMIT PLAT_ARM_MAX_BL31_SIZE
#else
/* Put BL31 below BL2 in the Trusted SRAM.*/
#define BL31_BASE ((ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)\
diff --git a/plat/common/plat_log_common.c b/plat/common/plat_log_common.c
index 49e1c15..c757c6b 100644
--- a/plat/common/plat_log_common.c
+++ b/plat/common/plat_log_common.c
@@ -5,6 +5,7 @@
*/
#include <debug.h>
+#include <platform.h>
/* Allow platforms to override the log prefix string */
#pragma weak plat_log_get_prefix
diff --git a/plat/hisilicon/hikey/include/platform_def.h b/plat/hisilicon/hikey/include/platform_def.h
index f2d358a..485eb38 100644
--- a/plat/hisilicon/hikey/include/platform_def.h
+++ b/plat/hisilicon/hikey/include/platform_def.h
@@ -41,7 +41,7 @@
#define MAX_IO_DEVICES 3
#define MAX_IO_HANDLES 4
/* eMMC RPMB and eMMC User Data */
-#define MAX_IO_BLOCK_DEVICES 2
+#define MAX_IO_BLOCK_DEVICES U(2)
/* GIC related constants (no GICR in GIC-400) */
#define PLAT_ARM_GICD_BASE 0xF6801000
diff --git a/plat/hisilicon/hikey960/include/platform_def.h b/plat/hisilicon/hikey960/include/platform_def.h
index 3717ff8..427a1e7 100644
--- a/plat/hisilicon/hikey960/include/platform_def.h
+++ b/plat/hisilicon/hikey960/include/platform_def.h
@@ -38,7 +38,7 @@
#define MAX_IO_DEVICES 3
#define MAX_IO_HANDLES 4
/* UFS RPMB and UFS User Data */
-#define MAX_IO_BLOCK_DEVICES 2
+#define MAX_IO_BLOCK_DEVICES U(2)
/*
diff --git a/plat/hisilicon/poplar/include/platform_def.h b/plat/hisilicon/poplar/include/platform_def.h
index 6287a76..e39d944 100644
--- a/plat/hisilicon/poplar/include/platform_def.h
+++ b/plat/hisilicon/poplar/include/platform_def.h
@@ -40,7 +40,7 @@
/* IO framework user */
#define MAX_IO_DEVICES (4)
#define MAX_IO_HANDLES (4)
-#define MAX_IO_BLOCK_DEVICES (2)
+#define MAX_IO_BLOCK_DEVICES U(2)
/* Memory size options */
#define POPLAR_DRAM_SIZE_1G 0
diff --git a/plat/imx/imx7/warp7/include/platform_def.h b/plat/imx/imx7/warp7/include/platform_def.h
index d0148f4..4ee6fd3 100644
--- a/plat/imx/imx7/warp7/include/platform_def.h
+++ b/plat/imx/imx7/warp7/include/platform_def.h
@@ -169,7 +169,7 @@
#define MAX_XLAT_TABLES 6
#define MAX_IO_DEVICES 2
#define MAX_IO_HANDLES 3
-#define MAX_IO_BLOCK_DEVICES 1
+#define MAX_IO_BLOCK_DEVICES 1U
/* UART defines */
#if PLAT_WARP7_UART == 1
diff --git a/plat/socionext/uniphier/include/platform_def.h b/plat/socionext/uniphier/include/platform_def.h
index 3d71db2..6e9b98e 100644
--- a/plat/socionext/uniphier/include/platform_def.h
+++ b/plat/socionext/uniphier/include/platform_def.h
@@ -53,7 +53,7 @@
#define MAX_IO_HANDLES 2
#define MAX_IO_DEVICES 2
-#define MAX_IO_BLOCK_DEVICES 1
+#define MAX_IO_BLOCK_DEVICES U(1)
#define TSP_SEC_MEM_BASE (BL32_BASE)
#define TSP_SEC_MEM_SIZE ((BL32_LIMIT) - (BL32_BASE))