Rename GICv3 interrupt group macros
This patch renames the GICv3 interrupt group macros from
INT_TYPE_G0, INT_TYPE_G1S and INT_TYPE_G1NS to INTR_GROUP0,
INTR_GROUP1S and INTR_GROUP1NS respectively.
Change-Id: I40c66f589ce6234fa42205adcd91f7d6ad8f33d4
diff --git a/drivers/arm/gic/v3/gicv3_helpers.c b/drivers/arm/gic/v3/gicv3_helpers.c
index 6e8251d..2fb98cb 100644
--- a/drivers/arm/gic/v3/gicv3_helpers.c
+++ b/drivers/arm/gic/v3/gicv3_helpers.c
@@ -312,7 +312,7 @@
unsigned int index, irq_num;
uint64_t gic_affinity_val;
- assert((int_grp == INT_TYPE_G1S) || (int_grp == INT_TYPE_G0));
+ assert((int_grp == INTR_GROUP1S) || (int_grp == INTR_GROUP0));
/* If `num_ints` is not 0, ensure that `sec_intr_list` is not NULL */
assert(num_ints ? (uintptr_t)sec_intr_list : 1);
@@ -324,7 +324,7 @@
gicd_clr_igroupr(gicd_base, irq_num);
/* Configure this interrupt as G0 or a G1S interrupt */
- if (int_grp == INT_TYPE_G1S)
+ if (int_grp == INTR_GROUP1S)
gicd_set_igrpmodr(gicd_base, irq_num);
else
gicd_clr_igrpmodr(gicd_base, irq_num);
@@ -386,7 +386,7 @@
{
unsigned int index, irq_num;
- assert((int_grp == INT_TYPE_G1S) || (int_grp == INT_TYPE_G0));
+ assert((int_grp == INTR_GROUP1S) || (int_grp == INTR_GROUP0));
/* If `num_ints` is not 0, ensure that `sec_intr_list` is not NULL */
assert(num_ints ? (uintptr_t)sec_intr_list : 1);
@@ -398,7 +398,7 @@
gicr_clr_igroupr0(gicr_base, irq_num);
/* Configure this interrupt as G0 or a G1S interrupt */
- if (int_grp == INT_TYPE_G1S)
+ if (int_grp == INTR_GROUP1S)
gicr_set_igrpmodr0(gicr_base, irq_num);
else
gicr_clr_igrpmodr0(gicr_base, irq_num);
diff --git a/drivers/arm/gic/v3/gicv3_main.c b/drivers/arm/gic/v3/gicv3_main.c
index 06311e3..d5cd0ed 100644
--- a/drivers/arm/gic/v3/gicv3_main.c
+++ b/drivers/arm/gic/v3/gicv3_main.c
@@ -144,13 +144,13 @@
gicv3_secure_spis_configure(driver_data->gicd_base,
driver_data->g1s_interrupt_num,
driver_data->g1s_interrupt_array,
- INT_TYPE_G1S);
+ INTR_GROUP1S);
/* Configure the G0 SPIs */
gicv3_secure_spis_configure(driver_data->gicd_base,
driver_data->g0_interrupt_num,
driver_data->g0_interrupt_array,
- INT_TYPE_G0);
+ INTR_GROUP0);
/* Enable the secure SPIs now that they have been configured */
gicd_set_ctlr(driver_data->gicd_base,
@@ -186,13 +186,13 @@
gicv3_secure_ppi_sgi_configure(gicr_base,
driver_data->g1s_interrupt_num,
driver_data->g1s_interrupt_array,
- INT_TYPE_G1S);
+ INTR_GROUP1S);
/* Configure the G0 SGIs/PPIs */
gicv3_secure_ppi_sgi_configure(gicr_base,
driver_data->g0_interrupt_num,
driver_data->g0_interrupt_array,
- INT_TYPE_G0);
+ INTR_GROUP0);
}
/*******************************************************************************
@@ -332,9 +332,9 @@
* this interrupt has been configured under by the interrupt controller i.e.
* group0 or group1 Secure / Non Secure. The return value can be one of the
* following :
- * INT_TYPE_G0 : The interrupt type is a Secure Group 0 interrupt
- * INT_TYPE_G1S : The interrupt type is a Secure Group 1 secure interrupt
- * INT_TYPE_G1NS: The interrupt type is a Secure Group 1 non secure
+ * INTR_GROUP0 : The interrupt type is a Secure Group 0 interrupt
+ * INTR_GROUP1S : The interrupt type is a Secure Group 1 secure interrupt
+ * INTR_GROUP1NS: The interrupt type is a Secure Group 1 non secure
* interrupt.
******************************************************************************/
unsigned int gicv3_get_interrupt_type(unsigned int id,
@@ -352,7 +352,7 @@
/* All LPI interrupts are Group 1 non secure */
if (id >= MIN_LPI_ID)
- return INT_TYPE_G1NS;
+ return INTR_GROUP1NS;
if (id < MIN_SPI_ID) {
assert(driver_data->rdistif_base_addrs);
@@ -370,12 +370,12 @@
* interrupt
*/
if (igroup)
- return INT_TYPE_G1NS;
+ return INTR_GROUP1NS;
/* If the GRPMOD bit is set, then it is a Group 1 Secure interrupt */
if (grpmodr)
- return INT_TYPE_G1S;
+ return INTR_GROUP1S;
/* Else it is a Group 0 Secure interrupt */
- return INT_TYPE_G0;
+ return INTR_GROUP0;
}
diff --git a/include/drivers/arm/gicv3.h b/include/drivers/arm/gicv3.h
index e874f5c..ae6fd91 100644
--- a/include/drivers/arm/gicv3.h
+++ b/include/drivers/arm/gicv3.h
@@ -35,9 +35,9 @@
* GICv3 miscellaneous definitions
******************************************************************************/
/* Interrupt group definitions */
-#define INT_TYPE_G1S 0
-#define INT_TYPE_G0 1
-#define INT_TYPE_G1NS 2
+#define INTR_GROUP1S 0
+#define INTR_GROUP0 1
+#define INTR_GROUP1NS 2
/* Interrupt IDs reported by the HPPIR and IAR registers */
#define PENDING_G1S_INTID 1020