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git01.mediatek.com / filogic / atf / 5a6f9d4fb4c91f89556b8bafec4039b9d76f7b80 / . / docs / resources / diagrams
tree: 4e537543c169dfac376193e6927b45dd48e6ff19 [path history] [tgz]
  1. draw.io/
  2. plantuml/
  3. cmake_framework_structure.png
  4. cmake_framework_workflow.png
  5. default_reset_code.png
  6. ff-a-spm-sel2.png
  7. fwu_flow.png
  8. fwu_states.png
  9. int_handling.dia
  10. Makefile
  11. non-sec-int-handling.png
  12. psci-suspend-sequence.png
  13. reset_code_flow.dia
  14. reset_code_no_boot_type_check.png
  15. reset_code_no_checks.png
  16. reset_code_no_cpu_check.png
  17. romlib_design.dia
  18. romlib_design.png
  19. romlib_wrapper.dia
  20. romlib_wrapper.png
  21. rt-svc-descs-layout.png
  22. sec-int-handling.png
  23. secure_sw_stack_sp.png
  24. secure_sw_stack_tos.png
  25. xlat_align.dia
  26. xlat_align.png