tree 279cc70e25616c309137a83e5a3613e87dc9fb1b
parent 18428a1afa8cde2ab2035d02d825e5f0f61b752a
author Arvind Ram Prakash <arvind.ramprakash@arm.com> 1690313592 -0500
committer Arvind Ram Prakash <arvind.ramprakash@arm.com> 1691781262 -0500

refactor(cpus): convert Neoverse Poseidon to framework

This involves replacing:
 * the reset_func with the standard cpu_reset_func_{start,end} to apply
   errata automatically
 * the <cpu>_errata_report with the errata_report_shim to report errata
   automatically
...and for each erratum:
 * the prologue with the workaround_<type>_start to do the checks and
   framework registration automatically
 * the epilogue with the workaround_<type>_end
 * the checker function with the check_erratum_<type> to make it more
   descriptive

It is important to note that the errata workaround sequences remain
unchanged and preserve their git blame.

Testing was conducted by:

 * Manual comparison of disassembly of converted functions with non-
   converted functions

   aarch64-none-elf-objdump -D <trusted-firmware-a with conversion>/build/fvp/release/bl31/bl31.elf
     vs
   aarch64-none-elf-objdump -D <trusted-firmware-a clean repo>/build/fvp/release/bl31/bl31.elf

 * Build for release with all errata flags enabled and run default tftf
   tests

CROSS_COMPILE=aarch64-none-elf- make PLAT=fvp DEBUG=0 \
CTX_INCLUDE_AARCH32_REGS=0 HW_ASSISTED_COHERENCY=1 USE_COHERENT_MEM=0 \
BL33=./../tf-a-tests/build/fvp/release/tftf.bin \
WORKAROUND_CVE_2022_23960=1 ERRATA_ABI_SUPPORT=1 all fip

 * Build for debug with all errata enabled and step through ArmDS
   at reset to ensure all functions are entered.

Change-Id: I34e27e468d4f971423a03a95a4a52f4af8bd783a
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>