Merge "feat(cpus): support to update External LLC presence in Neoverse N3" into integration
diff --git a/Makefile b/Makefile
index 2902774..5e3bb00 100644
--- a/Makefile
+++ b/Makefile
@@ -907,10 +907,6 @@
endif
endif #(CTX_INCLUDE_PAUTH_REGS)
-ifeq ($(PSA_FWU_SUPPORT),1)
- $(info PSA_FWU_SUPPORT is an experimental feature)
-endif #(PSA_FWU_SUPPORT)
-
ifeq ($(FEATURE_DETECTION),1)
$(info FEATURE_DETECTION is an experimental feature)
endif #(FEATURE_DETECTION)
@@ -1017,6 +1013,10 @@
$(info PSA_CRYPTO is an experimental feature)
endif
+ifeq ($(DICE_PROTECTION_ENVIRONMENT),1)
+ $(info DICE_PROTECTION_ENVIRONMENT is an experimental feature)
+endif
+
################################################################################
# Process platform overrideable behaviour
################################################################################
@@ -1206,6 +1206,7 @@
ENABLE_CONSOLE_GETC \
INIT_UNUSED_NS_EL2 \
PLATFORM_REPORT_CTX_MEM_USE \
+ EARLY_CONSOLE \
)))
# Numeric_Flags
@@ -1403,6 +1404,7 @@
ENABLE_CONSOLE_GETC \
INIT_UNUSED_NS_EL2 \
PLATFORM_REPORT_CTX_MEM_USE \
+ EARLY_CONSOLE \
)))
ifeq (${PLATFORM_REPORT_CTX_MEM_USE}, 1)
diff --git a/bl1/bl1_main.c b/bl1/bl1_main.c
index 9f19b4a..2b3a827 100644
--- a/bl1/bl1_main.c
+++ b/bl1/bl1_main.c
@@ -44,6 +44,9 @@
******************************************************************************/
void bl1_setup(void)
{
+ /* Enable early console if EARLY_CONSOLE flag is enabled */
+ plat_setup_early_console();
+
/* Perform early platform-specific setup */
bl1_early_platform_setup();
diff --git a/bl2/bl2_main.c b/bl2/bl2_main.c
index 4c68f07..f12c1a5 100644
--- a/bl2/bl2_main.c
+++ b/bl2/bl2_main.c
@@ -42,6 +42,9 @@
void bl2_el3_setup(u_register_t arg0, u_register_t arg1, u_register_t arg2,
u_register_t arg3)
{
+ /* Enable early console if EARLY_CONSOLE flag is enabled */
+ plat_setup_early_console();
+
/* Perform early platform-specific setup */
bl2_el3_early_platform_setup(arg0, arg1, arg2, arg3);
@@ -64,6 +67,9 @@
void bl2_setup(u_register_t arg0, u_register_t arg1, u_register_t arg2,
u_register_t arg3)
{
+ /* Enable early console if EARLY_CONSOLE flag is enabled */
+ plat_setup_early_console();
+
/* Perform early platform-specific setup */
bl2_early_platform_setup2(arg0, arg1, arg2, arg3);
diff --git a/bl31/bl31_main.c b/bl31/bl31_main.c
index cae9b14..83be0f6 100644
--- a/bl31/bl31_main.c
+++ b/bl31/bl31_main.c
@@ -95,6 +95,9 @@
void bl31_setup(u_register_t arg0, u_register_t arg1, u_register_t arg2,
u_register_t arg3)
{
+ /* Enable early console if EARLY_CONSOLE flag is enabled */
+ plat_setup_early_console();
+
/* Perform early platform-specific setup */
bl31_early_platform_setup2(arg0, arg1, arg2, arg3);
@@ -212,8 +215,6 @@
*/
bl31_prepare_next_image_entry();
- console_flush();
-
/*
* Perform any platform specific runtime setup prior to cold boot exit
* from BL31
@@ -221,9 +222,12 @@
bl31_plat_runtime_setup();
#if ENABLE_RUNTIME_INSTRUMENTATION
- PMF_CAPTURE_TIMESTAMP(bl_svc, BL31_EXIT, PMF_CACHE_MAINT);
console_flush();
+ PMF_CAPTURE_TIMESTAMP(bl_svc, BL31_EXIT, PMF_CACHE_MAINT);
#endif
+
+ console_flush();
+ console_switch_state(CONSOLE_FLAG_RUNTIME);
}
/*******************************************************************************
diff --git a/bl32/sp_min/aarch32/entrypoint.S b/bl32/sp_min/aarch32/entrypoint.S
index 693dd4b..ba9d90d 100644
--- a/bl32/sp_min/aarch32/entrypoint.S
+++ b/bl32/sp_min/aarch32/entrypoint.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2023, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -118,8 +118,7 @@
mov r1, r10
mov r2, r11
mov r3, r12
- bl sp_min_early_platform_setup2
- bl sp_min_plat_arch_setup
+ bl sp_min_setup
/* Jump to the main function */
bl sp_min_main
diff --git a/bl32/sp_min/sp_min_main.c b/bl32/sp_min/sp_min_main.c
index 61feaec..a26910c 100644
--- a/bl32/sp_min/sp_min_main.c
+++ b/bl32/sp_min/sp_min_main.c
@@ -171,6 +171,20 @@
}
/******************************************************************************
+ * The SP_MIN setup function. Calls platforms init functions
+ *****************************************************************************/
+void sp_min_setup(u_register_t arg0, u_register_t arg1, u_register_t arg2,
+ u_register_t arg3)
+{
+ /* Enable early console if EARLY_CONSOLE flag is enabled */
+ plat_setup_early_console();
+
+ /* Perform early platform-specific setup */
+ sp_min_early_platform_setup2(arg0, arg1, arg2, arg3);
+ sp_min_plat_arch_setup();
+}
+
+/******************************************************************************
* The SP_MIN main function. Do the platform and PSCI Library setup. Also
* initialize the runtime service framework.
*****************************************************************************/
diff --git a/bl32/sp_min/sp_min_private.h b/bl32/sp_min/sp_min_private.h
index 628581a..9c6b5fb 100644
--- a/bl32/sp_min/sp_min_private.h
+++ b/bl32/sp_min/sp_min_private.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -7,6 +7,10 @@
#ifndef SP_MIN_PRIVATE_H
#define SP_MIN_PRIVATE_H
+#include <stdint.h>
+
+void sp_min_setup(u_register_t arg0, u_register_t arg1, u_register_t arg2,
+ u_register_t arg3);
void sp_min_main(void);
void sp_min_warm_boot(void);
void sp_min_fiq(void);
diff --git a/bl32/tsp/tsp_common.c b/bl32/tsp/tsp_common.c
index 908b4ff..3a6c9d9 100644
--- a/bl32/tsp/tsp_common.c
+++ b/bl32/tsp/tsp_common.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2022, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2022-2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -66,6 +66,9 @@
******************************************************************************/
void tsp_setup(void)
{
+ /* Enable early console if EARLY_CONSOLE flag is enabled */
+ plat_setup_early_console();
+
/* Perform early platform-specific setup. */
tsp_early_platform_setup();
diff --git a/docs/getting_started/build-options.rst b/docs/getting_started/build-options.rst
index c18c155..2892dc6 100644
--- a/docs/getting_started/build-options.rst
+++ b/docs/getting_started/build-options.rst
@@ -230,6 +230,13 @@
contributions are still expected to build with ``W=0`` and ``E=1`` (the
default).
+- ``EARLY_CONSOLE``: This option is used to enable early traces before default
+ console is properly setup. It introduces EARLY_* traces macros, that will
+ use the non-EARLY traces macros if the flag is enabled, or do nothing
+ otherwise. To use this feature, platforms will have to create the function
+ plat_setup_early_console().
+ Default is 0 (disabled)
+
- ``EL3_PAYLOAD_BASE``: This option enables booting an EL3 payload instead of
the normal boot flow. It must specify the entry point address of the EL3
payload. Please refer to the "Booting an EL3 payload" section for more
diff --git a/docs/plat/st/stm32mpus.rst b/docs/plat/st/stm32mpus.rst
index ab6d8fe..7b47112 100644
--- a/docs/plat/st/stm32mpus.rst
+++ b/docs/plat/st/stm32mpus.rst
@@ -54,8 +54,6 @@
| Default: stm32mp157c-ev1.dtb
- | ``DWL_BUFFER_BASE``: the 'serial boot' load address of FIP,
| default location (end of the first 128MB) is used when absent
-- | ``STM32MP_EARLY_CONSOLE``: to enable early traces before clock driver is setup.
- | Default: 0 (disabled)
- | ``STM32MP_RECONFIGURE_CONSOLE``: to re-configure crash console (especially after BL2).
| Default: 0 (disabled)
- | ``STM32MP_UART_BAUDRATE``: to select UART baud rate.
diff --git a/docs/porting-guide.rst b/docs/porting-guide.rst
index c25c8cb..a7600ec 100644
--- a/docs/porting-guide.rst
+++ b/docs/porting-guide.rst
@@ -3286,6 +3286,17 @@
data on the designated crash console. It should only use general purpose
registers x0 through x5 to do its work.
+Function : plat_setup_early_console [optional]
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+::
+
+ Argument : void
+ Return : void
+
+This API is used to setup the early console, it is required only if the flag
+``EARLY_CONSOLE`` is enabled.
+
.. _External Abort handling and RAS Support:
External Abort handling and RAS Support
@@ -3572,7 +3583,7 @@
--------------
-*Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.*
+*Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.*
.. _PSCI: https://developer.arm.com/documentation/den0022/latest/
.. _Arm Generic Interrupt Controller version 2.0 (GICv2): http://infocenter.arm.com/help/topic/com.arm.doc.ihi0048b/index.html
diff --git a/drivers/auth/mbedtls/mbedtls_common.mk b/drivers/auth/mbedtls/mbedtls_common.mk
index 2bb23f9..55ab935 100644
--- a/drivers/auth/mbedtls/mbedtls_common.mk
+++ b/drivers/auth/mbedtls/mbedtls_common.mk
@@ -41,7 +41,6 @@
cipher.c \
cipher_wrap.c \
constant_time.c \
- hash_info.c \
memory_buffer_alloc.c \
oid.c \
platform.c \
@@ -51,6 +50,7 @@
gcm.c \
md.c \
pk.c \
+ pk_ecc.c \
pk_wrap.c \
pkparse.c \
pkwrite.c \
@@ -65,22 +65,16 @@
x509_crt.c \
)
-# Currently on Mbedtls-3 there is outstanding bug due to usage
-# of redundant declaration[1], So disable redundant-decls
-# compilation flag to avoid compilation error when compiling with
-# Mbedtls-3.
-# [1]: https://github.com/Mbed-TLS/mbedtls/issues/6910
-LIBMBEDTLS_CFLAGS += -Wno-error=redundant-decls
-
ifeq (${PSA_CRYPTO},1)
+LIBMBEDTLS_CFLAGS += -Wno-error=unused-but-set-variable
LIBMBEDTLS_SRCS += $(addprefix ${MBEDTLS_DIR}/library/, \
psa_crypto.c \
psa_crypto_client.c \
- psa_crypto_driver_wrappers.c \
psa_crypto_hash.c \
psa_crypto_rsa.c \
psa_crypto_ecp.c \
psa_crypto_slot_management.c \
+ psa_util.c \
)
endif
diff --git a/drivers/auth/mbedtls/mbedtls_crypto.c b/drivers/auth/mbedtls/mbedtls_crypto.c
index 230cec9..9bfcaac 100644
--- a/drivers/auth/mbedtls/mbedtls_crypto.c
+++ b/drivers/auth/mbedtls/mbedtls_crypto.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -65,6 +65,18 @@
#if CRYPTO_SUPPORT == CRYPTO_AUTH_VERIFY_ONLY || \
CRYPTO_SUPPORT == CRYPTO_AUTH_VERIFY_AND_HASH_CALC
+
+
+/*
+ * NOTE: This has been made internal in mbedtls 3.6.0 and the mbedtls team has
+ * advised that it's better to copy out the declaration than it would be to
+ * update to 3.5.2, where this function is exposed.
+ */
+int mbedtls_x509_get_sig_alg(const mbedtls_x509_buf *sig_oid,
+ const mbedtls_x509_buf *sig_params,
+ mbedtls_md_type_t *md_alg,
+ mbedtls_pk_type_t *pk_alg,
+ void **sig_opts);
/*
* Verify a signature.
*
diff --git a/drivers/auth/mbedtls/mbedtls_psa_crypto.c b/drivers/auth/mbedtls/mbedtls_psa_crypto.c
index 5891acf..99242e3 100644
--- a/drivers/auth/mbedtls/mbedtls_psa_crypto.c
+++ b/drivers/auth/mbedtls/mbedtls_psa_crypto.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2023, Arm Limited. All rights reserved.
+ * Copyright (c) 2023-2024, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -14,6 +14,7 @@
#include <mbedtls/memory_buffer_alloc.h>
#include <mbedtls/oid.h>
#include <mbedtls/platform.h>
+#include <mbedtls/psa_util.h>
#include <mbedtls/version.h>
#include <mbedtls/x509.h>
#include <psa/crypto.h>
@@ -49,16 +50,6 @@
* CRYPTO_SUPPORT == CRYPTO_AUTH_VERIFY_AND_HASH_CALC
*/
-static inline psa_algorithm_t mbedtls_md_psa_alg_from_type(
- mbedtls_md_type_t md_type)
-{
- assert((md_type == MBEDTLS_MD_SHA256) ||
- (md_type == MBEDTLS_MD_SHA384) ||
- (md_type == MBEDTLS_MD_SHA512));
-
- return PSA_ALG_CATEGORY_HASH | (psa_algorithm_t) (md_type + 0x5);
-}
-
/*
* AlgorithmIdentifier ::= SEQUENCE {
* algorithm OBJECT IDENTIFIER,
@@ -293,6 +284,62 @@
**/
/*
+ * This is a helper function that adjusts the start of the pk_start to point to
+ * the subjectPublicKey bytes within the SubjectPublicKeyInfo block.
+ *
+ * SubjectPublicKeyInfo ::= SEQUENCE {
+ * algorithm AlgorithmIdentifier,
+ * subjectPublicKey BIT STRING }
+ *
+ * This function returns error(CRYPTO_ERR_SIGNATURE) on ASN.1 parsing failure,
+ * otherwise success(0).
+ **/
+static int pk_bytes_from_subpubkey(unsigned char **pk_start,
+ unsigned int *pk_len)
+{
+ mbedtls_asn1_buf alg_oid, alg_params;
+ int rc;
+ unsigned char *pk_end;
+ size_t len;
+ unsigned char *pk_ptr = *pk_start;
+
+ pk_end = pk_ptr + *pk_len;
+ rc = mbedtls_asn1_get_tag(&pk_ptr, pk_end, &len,
+ MBEDTLS_ASN1_CONSTRUCTED |
+ MBEDTLS_ASN1_SEQUENCE);
+ if (rc != 0) {
+ return CRYPTO_ERR_SIGNATURE;
+ }
+
+ pk_end = pk_ptr + len;
+ rc = mbedtls_asn1_get_alg(&pk_ptr, pk_end, &alg_oid, &alg_params);
+ if (rc != 0) {
+ return CRYPTO_ERR_SIGNATURE;
+ }
+ pk_end = pk_ptr + len - (alg_oid.len + alg_params.len +
+ 2 * (SIZE_OF_ASN1_LEN + SIZE_OF_ASN1_TAG));
+ rc = mbedtls_asn1_get_bitstring_null(&pk_ptr, pk_end, &len);
+ if (rc != 0) {
+ return CRYPTO_ERR_SIGNATURE;
+ }
+
+ *pk_start = pk_ptr;
+ *pk_len = len;
+
+ return rc;
+}
+
+/*
+ * NOTE: This has been made internal in mbedtls 3.6.0 and the mbedtls team has
+ * advised that it's better to copy out the declaration than it would be to
+ * update to 3.5.2, where this function is exposed.
+ */
+int mbedtls_x509_get_sig_alg(const mbedtls_x509_buf *sig_oid,
+ const mbedtls_x509_buf *sig_params,
+ mbedtls_md_type_t *md_alg,
+ mbedtls_pk_type_t *pk_alg,
+ void **sig_opts);
+/*
* Verify a signature.
*
* Parameters are passed using the DER encoding format following the ASN.1
@@ -388,6 +435,20 @@
psa_set_key_type(&psa_key_attr, psa_key_type);
psa_set_key_usage_flags(&psa_key_attr, PSA_KEY_USAGE_VERIFY_MESSAGE);
+ /*
+ * Note: In the implementation of the psa_import_key function in
+ * version 3.6.0, the function expects the starting pointer of the
+ * subject public key instead of the starting point of
+ * SubjectPublicKeyInfo.
+ * This is only needed while dealing with RSASSA_PSS (RSA Signature
+ * scheme with Appendix based on Probabilistic Signature Scheme)
+ * algorithm.
+ */
+ if (pk_alg == MBEDTLS_PK_RSASSA_PSS) {
+ rc = pk_bytes_from_subpubkey((unsigned char **) &pk_ptr, &pk_len);
+ goto end2;
+ }
+
/* Get the key_id using import API */
status = psa_import_key(&psa_key_attr,
pk_ptr,
diff --git a/drivers/st/bsec/bsec2.c b/drivers/st/bsec/bsec2.c
index a6e5220..db07d1c 100644
--- a/drivers/st/bsec/bsec2.c
+++ b/drivers/st/bsec/bsec2.c
@@ -166,11 +166,13 @@
struct dt_node_info bsec_info;
if (fdt_get_address(&fdt) == 0) {
+ EARLY_ERROR("%s: DT not found\n", __func__);
panic();
}
node = bsec_get_dt_node(&bsec_info);
if (node < 0) {
+ EARLY_ERROR("%s: BSEC node not found\n", __func__);
panic();
}
@@ -226,13 +228,21 @@
*/
uint32_t bsec_probe(void)
{
+ uint32_t version;
+ uint32_t id;
+
if (is_otp_invalid_mode()) {
+ EARLY_ERROR("%s: otp_invalid_mod\n", __func__);
return BSEC_ERROR;
}
- if (((bsec_get_version() != BSEC_IP_VERSION_1_1) &&
- (bsec_get_version() != BSEC_IP_VERSION_2_0)) ||
- (bsec_get_id() != BSEC_IP_ID_2)) {
+ version = bsec_get_version();
+ id = bsec_get_id();
+
+ if (((version != BSEC_IP_VERSION_1_1) &&
+ (version != BSEC_IP_VERSION_2_0)) ||
+ (id != BSEC_IP_ID_2)) {
+ EARLY_ERROR("%s: version = 0x%x, id = 0x%x\n", __func__, version, id);
panic();
}
diff --git a/drivers/st/bsec/bsec3.c b/drivers/st/bsec/bsec3.c
index a803a3a..3fdaf16 100644
--- a/drivers/st/bsec/bsec3.c
+++ b/drivers/st/bsec/bsec3.c
@@ -188,7 +188,7 @@
uint32_t id = bsec_get_id();
if ((version != BSEC_IP_VERSION_1_0) || (id != BSEC_IP_ID_3)) {
- ERROR("%s: version = 0x%x, id = 0x%x\n", __func__, version, id);
+ EARLY_ERROR("%s: version = 0x%x, id = 0x%x\n", __func__, version, id);
panic();
}
diff --git a/include/common/debug.h b/include/common/debug.h
index 5ea541d..0ddb400 100644
--- a/include/common/debug.h
+++ b/include/common/debug.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -91,6 +91,12 @@
# define VERBOSE(...) no_tf_log(LOG_MARKER_VERBOSE __VA_ARGS__)
#endif
+#if EARLY_CONSOLE
+#define EARLY_ERROR(...) ERROR(__VA_ARGS__)
+#else /* !EARLY_CONSOLE */
+#define EARLY_ERROR(...) no_tf_log(LOG_MARKER_ERROR __VA_ARGS__)
+#endif /* EARLY_CONSOLE */
+
const char *get_el_str(unsigned int el);
#if ENABLE_BACKTRACE
diff --git a/include/drivers/auth/mbedtls/mbedtls_config-3.h b/include/drivers/auth/mbedtls/mbedtls_config-3.h
index 923fc54..37a9288 100644
--- a/include/drivers/auth/mbedtls/mbedtls_config-3.h
+++ b/include/drivers/auth/mbedtls/mbedtls_config-3.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2023, Arm Limited. All rights reserved.
+ * Copyright (c) 2023-2024, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -128,7 +128,6 @@
#ifndef __ASSEMBLER__
/* System headers required to build mbed TLS with the current configuration */
#include <stdlib.h>
-#include <mbedtls/check_config.h>
#endif
/*
diff --git a/include/drivers/auth/mbedtls/psa_mbedtls_config.h b/include/drivers/auth/mbedtls/psa_mbedtls_config.h
index ad825f0..1001d89 100644
--- a/include/drivers/auth/mbedtls/psa_mbedtls_config.h
+++ b/include/drivers/auth/mbedtls/psa_mbedtls_config.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2023, Arm Ltd. All rights reserved.
+ * Copyright (c) 2023-2024, Arm Ltd. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -10,6 +10,7 @@
#include "mbedtls_config-3.h"
#define MBEDTLS_PSA_CRYPTO_C
+#define MBEDTLS_PSA_ASSUME_EXCLUSIVE_BUFFERS
/*
* Using PSA crypto API requires an RNG right now. If we don't define the macro
diff --git a/include/lib/cpus/aarch64/neoverse_v2.h b/include/lib/cpus/aarch64/neoverse_v2.h
index 39a6607..1171e95 100644
--- a/include/lib/cpus/aarch64/neoverse_v2.h
+++ b/include/lib/cpus/aarch64/neoverse_v2.h
@@ -16,6 +16,7 @@
* CPU Extended Control register specific definitions
******************************************************************************/
#define NEOVERSE_V2_CPUECTLR_EL1 S3_0_C15_C1_4
+#define NEOVERSE_V2_CPUECTLR_EL1_EXTLLC_BIT (ULL(1) << 0)
/*******************************************************************************
* CPU Power Control register specific definitions
diff --git a/include/lib/debugfs.h b/include/lib/debugfs.h
index 9415962..1fdccb6 100644
--- a/include/lib/debugfs.h
+++ b/include/lib/debugfs.h
@@ -66,8 +66,8 @@
*/
#define DEBUGFS_FID_VALUE (0x10U)
-#define is_debugfs_fid(_fid) \
- (((_fid) & FUNCID_NUM_MASK) == DEBUGFS_FID_VALUE)
+#define is_debugfs_fid(_fid) \
+ (GET_SMC_NUM(_fid) == DEBUGFS_FID_VALUE)
/* Function ID for accessing the debugfs interface from arm sip.
@@ -76,7 +76,7 @@
#define DEBUGFS_FID_VALUE_DEPRECATED (0x30U)
#define is_debugfs_fid_deprecated(_fid) \
- (((_fid) & FUNCID_NUM_MASK) == DEBUGFS_FID_VALUE_DEPRECATED)
+ (GET_SMC_NUM(_fid) == DEBUGFS_FID_VALUE_DEPRECATED)
/* Error code for debugfs SMC interface failures */
diff --git a/include/lib/pmf/pmf.h b/include/lib/pmf/pmf.h
index 38841d9..41bf7fc 100644
--- a/include/lib/pmf/pmf.h
+++ b/include/lib/pmf/pmf.h
@@ -44,7 +44,7 @@
#define PMF_FID_VALUE_DEPRECATED U(0x10)
#define is_pmf_fid_deprecated(_fid) \
- (((_fid) & FUNCID_NUM_MASK) == PMF_FID_VALUE_DEPRECATED)
+ (GET_SMC_NUM(_fid) == PMF_FID_VALUE_DEPRECATED)
/*
* Defines for PMF SMC function ids used with Vendor-Specific
@@ -64,7 +64,8 @@
* PMF calls from the SMC function ID.
*/
#define PMF_FID_VALUE U(0x20)
-#define is_pmf_fid(_fid) (((_fid) & FUNCID_NUM_MASK) == PMF_FID_VALUE)
+#define PMF_ID_MASK (FUNCID_NUM_MASK & ~(0xf))
+#define is_pmf_fid(_fid) ((GET_SMC_NUM(_fid) & PMF_ID_MASK) == PMF_FID_VALUE)
/* Following are the supported PMF service IDs */
#define PMF_PSCI_STAT_SVC_ID 0
diff --git a/include/plat/common/platform.h b/include/plat/common/platform.h
index 2af49a9..ce5e8e0 100644
--- a/include/plat/common/platform.h
+++ b/include/plat/common/platform.h
@@ -184,6 +184,14 @@
}
#endif /* MEASURED_BOOT */
+#if EARLY_CONSOLE
+void plat_setup_early_console(void);
+#else
+static inline void plat_setup_early_console(void)
+{
+}
+#endif /* EARLY_CONSOLE */
+
/*******************************************************************************
* Mandatory BL1 functions
******************************************************************************/
diff --git a/lib/cpus/aarch64/neoverse_v2.S b/lib/cpus/aarch64/neoverse_v2.S
index d4b3a96..3179918 100644
--- a/lib/cpus/aarch64/neoverse_v2.S
+++ b/lib/cpus/aarch64/neoverse_v2.S
@@ -109,6 +109,11 @@
cpu_reset_func_start neoverse_v2
/* Disable speculative loads */
msr SSBS, xzr
+
+#if NEOVERSE_Vx_EXTERNAL_LLC
+ /* Some systems may have External LLC, core needs to be made aware */
+ sysreg_bit_set NEOVERSE_V2_CPUECTLR_EL1, NEOVERSE_V2_CPUECTLR_EL1_EXTLLC_BIT
+#endif
cpu_reset_func_end neoverse_v2
errata_report_shim neoverse_v2
diff --git a/make_helpers/defaults.mk b/make_helpers/defaults.mk
index 26d2a00..b9ea810 100644
--- a/make_helpers/defaults.mk
+++ b/make_helpers/defaults.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2016-2023, Arm Limited. All rights reserved.
+# Copyright (c) 2016-2024, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -392,3 +392,6 @@
# Enable context memory usage reporting during BL31 setup.
PLATFORM_REPORT_CTX_MEM_USE := 0
+
+# Enable early console
+EARLY_CONSOLE := 0
diff --git a/plat/allwinner/common/sunxi_bl31_setup.c b/plat/allwinner/common/sunxi_bl31_setup.c
index 1863292..24edd79 100644
--- a/plat/allwinner/common/sunxi_bl31_setup.c
+++ b/plat/allwinner/common/sunxi_bl31_setup.c
@@ -186,9 +186,6 @@
{
/* Change the DTB if the configuration requires so. */
sunxi_prepare_dtb(fdt);
-
- console_flush();
- console_switch_state(CONSOLE_FLAG_RUNTIME);
}
entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
diff --git a/plat/arm/board/tc/platform_test.mk b/plat/arm/board/tc/platform_test.mk
index 8ef6f76..8d39325 100644
--- a/plat/arm/board/tc/platform_test.mk
+++ b/plat/arm/board/tc/platform_test.mk
@@ -61,11 +61,12 @@
hmac_drbg.c \
psa_crypto.c \
psa_crypto_client.c \
- psa_crypto_driver_wrappers.c \
+ psa_crypto_driver_wrappers_no_static.c \
psa_crypto_hash.c \
psa_crypto_rsa.c \
psa_crypto_ecp.c \
psa_crypto_slot_management.c \
+ psa_util.c \
)
BL31_SOURCES += ${RSE_COMMS_SOURCES} \
diff --git a/plat/arm/common/arm_bl31_setup.c b/plat/arm/common/arm_bl31_setup.c
index 414ac40..b7941ec 100644
--- a/plat/arm/common/arm_bl31_setup.c
+++ b/plat/arm/common/arm_bl31_setup.c
@@ -443,9 +443,6 @@
void bl31_plat_runtime_setup(void)
{
arm_bl31_plat_runtime_setup();
-
- console_flush();
- console_switch_state(CONSOLE_FLAG_RUNTIME);
}
/*******************************************************************************
diff --git a/plat/brcm/common/brcm_bl31_setup.c b/plat/brcm/common/brcm_bl31_setup.c
index d3fa83d..6eef1d4 100644
--- a/plat/brcm/common/brcm_bl31_setup.c
+++ b/plat/brcm/common/brcm_bl31_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2024, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -235,8 +235,6 @@
******************************************************************************/
void brcm_bl31_plat_runtime_setup(void)
{
- console_switch_state(CONSOLE_FLAG_RUNTIME);
-
/* Initialize the runtime console */
bcm_console_runtime_init();
}
diff --git a/plat/common/aarch64/plat_common.c b/plat/common/aarch64/plat_common.c
index 19c4e48..54f2a03 100644
--- a/plat/common/aarch64/plat_common.c
+++ b/plat/common/aarch64/plat_common.c
@@ -35,8 +35,6 @@
void bl31_plat_runtime_setup(void)
{
- console_flush();
- console_switch_state(CONSOLE_FLAG_RUNTIME);
}
/*
diff --git a/plat/hisilicon/hikey/hikey_bl31_setup.c b/plat/hisilicon/hikey/hikey_bl31_setup.c
index 7d008e7..55b425c 100644
--- a/plat/hisilicon/hikey/hikey_bl31_setup.c
+++ b/plat/hisilicon/hikey/hikey_bl31_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -149,7 +149,3 @@
hisi_ipc_init();
hisi_pwrc_setup();
}
-
-void bl31_plat_runtime_setup(void)
-{
-}
diff --git a/plat/hisilicon/hikey960/hikey960_bl31_setup.c b/plat/hisilicon/hikey960/hikey960_bl31_setup.c
index 159eee9..6e80347 100644
--- a/plat/hisilicon/hikey960/hikey960_bl31_setup.c
+++ b/plat/hisilicon/hikey960/hikey960_bl31_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2023, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
diff --git a/plat/hisilicon/poplar/bl31_plat_setup.c b/plat/hisilicon/poplar/bl31_plat_setup.c
index fe60ddc..5f4a18a 100644
--- a/plat/hisilicon/poplar/bl31_plat_setup.c
+++ b/plat/hisilicon/poplar/bl31_plat_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -118,11 +118,6 @@
hisi_tzpc_sec_init();
}
-void bl31_plat_runtime_setup(void)
-{
- /* do nothing */
-}
-
void bl31_plat_arch_setup(void)
{
plat_configure_mmu_el3(BL31_BASE,
diff --git a/plat/imx/imx8qm/imx8qm_bl31_setup.c b/plat/imx/imx8qm/imx8qm_bl31_setup.c
index bd7896a..4c63740 100644
--- a/plat/imx/imx8qm/imx8qm_bl31_setup.c
+++ b/plat/imx/imx8qm/imx8qm_bl31_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2024, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -408,8 +408,3 @@
{
return COUNTER_FREQUENCY;
}
-
-void bl31_plat_runtime_setup(void)
-{
- return;
-}
diff --git a/plat/imx/imx8qx/imx8qx_bl31_setup.c b/plat/imx/imx8qx/imx8qx_bl31_setup.c
index 13e80fb..08bf8f3 100644
--- a/plat/imx/imx8qx/imx8qx_bl31_setup.c
+++ b/plat/imx/imx8qx/imx8qx_bl31_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2024, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -386,8 +386,3 @@
{
return COUNTER_FREQUENCY;
}
-
-void bl31_plat_runtime_setup(void)
-{
- return;
-}
diff --git a/plat/imx/imx93/imx93_bl31_setup.c b/plat/imx/imx93/imx93_bl31_setup.c
index 8458f6c..a7d0f65 100644
--- a/plat/imx/imx93/imx93_bl31_setup.c
+++ b/plat/imx/imx93/imx93_bl31_setup.c
@@ -136,11 +136,6 @@
plat_gic_init();
}
-void bl31_plat_runtime_setup(void)
-{
- console_switch_state(CONSOLE_FLAG_RUNTIME);
-}
-
entry_point_info_t *bl31_plat_get_next_image_ep_info(unsigned int type)
{
if (type == NON_SECURE) {
diff --git a/plat/marvell/armada/common/marvell_bl31_setup.c b/plat/marvell/armada/common/marvell_bl31_setup.c
index 26ba906..b3641e3 100644
--- a/plat/marvell/armada/common/marvell_bl31_setup.c
+++ b/plat/marvell/armada/common/marvell_bl31_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2018 Marvell International Ltd.
+ * Copyright (C) 2018-2024 Marvell International Ltd.
*
* SPDX-License-Identifier: BSD-3-Clause
* https://spdx.org/licenses
@@ -181,8 +181,6 @@
*/
void marvell_bl31_plat_runtime_setup(void)
{
- console_switch_state(CONSOLE_FLAG_RUNTIME);
-
/* Initialize the runtime console */
marvell_console_runtime_init();
}
diff --git a/plat/mediatek/common/mtk_bl31_setup.c b/plat/mediatek/common/mtk_bl31_setup.c
index 7c9db8b..0d264b9 100644
--- a/plat/mediatek/common/mtk_bl31_setup.c
+++ b/plat/mediatek/common/mtk_bl31_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2022, MediaTek Inc. All rights reserved.
+ * Copyright (c) 2022-2024, MediaTek Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -166,7 +166,6 @@
void bl31_plat_runtime_setup(void)
{
mtk_init_one_level(MTK_INIT_LVL_PLAT_RUNTIME);
- console_switch_state(CONSOLE_FLAG_RUNTIME);
}
unsigned int plat_get_syscnt_freq2(void)
diff --git a/plat/nvidia/tegra/common/tegra_bl31_setup.c b/plat/nvidia/tegra/common/tegra_bl31_setup.c
index e3068b6..09eda84 100644
--- a/plat/nvidia/tegra/common/tegra_bl31_setup.c
+++ b/plat/nvidia/tegra/common/tegra_bl31_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2024, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2020-2023, NVIDIA Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
diff --git a/plat/socionext/synquacer/sq_bl31_setup.c b/plat/socionext/synquacer/sq_bl31_setup.c
index 967437b..e46d877 100644
--- a/plat/socionext/synquacer/sq_bl31_setup.c
+++ b/plat/socionext/synquacer/sq_bl31_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2022, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2024, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
diff --git a/plat/st/common/common.mk b/plat/st/common/common.mk
index b9b62c0..7ef7665 100644
--- a/plat/st/common/common.mk
+++ b/plat/st/common/common.mk
@@ -6,7 +6,6 @@
RESET_TO_BL2 := 1
-STM32MP_EARLY_CONSOLE ?= 0
STM32MP_RECONFIGURE_CONSOLE ?= 0
STM32MP_UART_BAUDRATE ?= 115200
@@ -82,7 +81,6 @@
$(eval $(call assert_booleans,\
$(sort \
PLAT_XLAT_TABLES_DYNAMIC \
- STM32MP_EARLY_CONSOLE \
STM32MP_EMMC \
STM32MP_EMMC_BOOT \
STM32MP_RAW_NAND \
@@ -104,7 +102,6 @@
$(sort \
PLAT_XLAT_TABLES_DYNAMIC \
STM32_TF_VERSION \
- STM32MP_EARLY_CONSOLE \
STM32MP_EMMC \
STM32MP_EMMC_BOOT \
STM32MP_RAW_NAND \
diff --git a/plat/st/common/include/plat_def_fip_uuid.h b/plat/st/common/include/plat_def_fip_uuid.h
new file mode 100644
index 0000000..096fd95
--- /dev/null
+++ b/plat/st/common/include/plat_def_fip_uuid.h
@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2021-2024, STMicroelectronics - All Rights Reserved
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef PLAT_DEF_FIP_UUID_H
+#define PLAT_DEF_FIP_UUID_H
+
+#define UUID_DDR_FW \
+ {{0xb1, 0x12, 0x49, 0xbe}, {0x92, 0xdd}, {0x4b, 0x10}, 0x86, 0x7c, \
+ {0x2c, 0x6a, 0x4b, 0x47, 0xa7, 0xfb} }
+
+#define UUID_STM32MP_CONFIG_CERT \
+ {{0x50, 0x1d, 0x8d, 0xd2}, {0x8b, 0xce}, {0x49, 0xa5}, 0x84, 0xeb, \
+ {0x55, 0x9a, 0x9f, 0x2e, 0xae, 0xaf} }
+#endif /* PLAT_DEF_FIP_UUID_H */
+
diff --git a/plat/st/common/include/stm32mp_common.h b/plat/st/common/include/stm32mp_common.h
index a1ed1ad..41b86ae 100644
--- a/plat/st/common/include/stm32mp_common.h
+++ b/plat/st/common/include/stm32mp_common.h
@@ -77,14 +77,6 @@
/* Setup the UART console */
int stm32mp_uart_console_setup(void);
-#if STM32MP_EARLY_CONSOLE
-void stm32mp_setup_early_console(void);
-#else
-static inline void stm32mp_setup_early_console(void)
-{
-}
-#endif
-
/*
* Platform util functions for the GPIO driver
* @bank: Target GPIO bank ID as per DT bindings
diff --git a/plat/st/common/include/stm32mp_mbedtls_config-3.h b/plat/st/common/include/stm32mp_mbedtls_config-3.h
index a812671..2dbf068 100644
--- a/plat/st/common/include/stm32mp_mbedtls_config-3.h
+++ b/plat/st/common/include/stm32mp_mbedtls_config-3.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2022-2023, STMicroelectronics - All Rights Reserved
+ * Copyright (c) 2022-2024, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -102,7 +102,6 @@
#ifndef __ASSEMBLER__
/* System headers required to build mbed TLS with the current configuration */
#include <stdlib.h>
-#include <mbedtls/check_config.h>
#endif
/*
diff --git a/plat/st/common/stm32mp_common.c b/plat/st/common/stm32mp_common.c
index a1d1c49..6f36011 100644
--- a/plat/st/common/stm32mp_common.c
+++ b/plat/st/common/stm32mp_common.c
@@ -269,8 +269,8 @@
return 0;
}
-#if STM32MP_EARLY_CONSOLE
-void stm32mp_setup_early_console(void)
+#if EARLY_CONSOLE
+void plat_setup_early_console(void)
{
#if defined(IMAGE_BL2) || STM32MP_RECONFIGURE_CONSOLE
plat_crash_console_init();
@@ -278,7 +278,7 @@
set_console(STM32MP_DEBUG_USART_BASE, STM32MP_DEBUG_USART_CLK_FRQ);
NOTICE("Early console setup\n");
}
-#endif /* STM32MP_EARLY_CONSOLE */
+#endif /* EARLY_CONSOLE */
/*****************************************************************************
* plat_is_smccc_feature_available() - This function checks whether SMCCC
diff --git a/plat/st/stm32mp1/bl2_plat_setup.c b/plat/st/stm32mp1/bl2_plat_setup.c
index 798c033..bd3903d 100644
--- a/plat/st/stm32mp1/bl2_plat_setup.c
+++ b/plat/st/stm32mp1/bl2_plat_setup.c
@@ -142,8 +142,6 @@
u_register_t arg2 __unused,
u_register_t arg3 __unused)
{
- stm32mp_setup_early_console();
-
stm32mp_save_boot_ctx_address(arg0);
}
diff --git a/plat/st/stm32mp1/include/plat_def_fip_uuid.h b/plat/st/stm32mp1/include/plat_def_fip_uuid.h
deleted file mode 100644
index e5fbc2d..0000000
--- a/plat/st/stm32mp1/include/plat_def_fip_uuid.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * Copyright (c) 2021-2022, STMicroelectronics - All Rights Reserved
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef PLAT_DEF_FIP_UUID_H
-#define PLAT_DEF_FIP_UUID_H
-
-#define UUID_STM32MP_CONFIG_CERT \
- {{0x50, 0x1d, 0x8d, 0xd2}, {0x8b, 0xce}, {0x49, 0xa5}, 0x84, 0xeb, \
- {0x55, 0x9a, 0x9f, 0x2e, 0xae, 0xaf} }
-#endif /* PLAT_DEF_FIP_UUID_H */
-
diff --git a/plat/st/stm32mp1/sp_min/sp_min_setup.c b/plat/st/stm32mp1/sp_min/sp_min_setup.c
index 245b2d3..7bfe6ba 100644
--- a/plat/st/stm32mp1/sp_min/sp_min_setup.c
+++ b/plat/st/stm32mp1/sp_min/sp_min_setup.c
@@ -116,8 +116,6 @@
bl_params_t *params_from_bl2 = (bl_params_t *)arg0;
uintptr_t dt_addr = arg1;
- stm32mp_setup_early_console();
-
/* Imprecise aborts can be masked in NonSecure */
write_scr(read_scr() | SCR_AW_BIT);
diff --git a/plat/st/stm32mp2/bl2_plat_setup.c b/plat/st/stm32mp2/bl2_plat_setup.c
index a7cce62..724209a 100644
--- a/plat/st/stm32mp2/bl2_plat_setup.c
+++ b/plat/st/stm32mp2/bl2_plat_setup.c
@@ -18,7 +18,6 @@
u_register_t arg2 __unused,
u_register_t arg3 __unused)
{
- stm32mp_setup_early_console();
}
void bl2_platform_setup(void)
@@ -28,7 +27,7 @@
void bl2_el3_plat_arch_setup(void)
{
if (stm32_otp_probe() != 0U) {
- ERROR("OTP probe failed\n");
+ EARLY_ERROR("OTP probe failed\n");
panic();
}
}
diff --git a/plat/xilinx/versal/bl31_versal_setup.c b/plat/xilinx/versal/bl31_versal_setup.c
index d19a263..08c0205 100644
--- a/plat/xilinx/versal/bl31_versal_setup.c
+++ b/plat/xilinx/versal/bl31_versal_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2024, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved.
* Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
*
@@ -206,8 +206,6 @@
if (rc != 0) {
panic();
}
-
- console_switch_state(CONSOLE_FLAG_RUNTIME);
}
/*
diff --git a/plat/xilinx/versal/plat_psci.c b/plat/xilinx/versal/plat_psci.c
index 48d9f5f..4cf1ed1 100644
--- a/plat/xilinx/versal/plat_psci.c
+++ b/plat/xilinx/versal/plat_psci.c
@@ -36,7 +36,7 @@
}
proc = pm_get_proc((uint32_t)cpu_id);
- if (!proc) {
+ if (proc == NULL) {
return PSCI_E_INTERN_FAIL;
}
@@ -62,7 +62,7 @@
uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
- if (!proc) {
+ if (proc == NULL) {
return;
}
@@ -103,7 +103,7 @@
uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
- if (!proc) {
+ if (proc == NULL) {
return;
}
@@ -201,7 +201,7 @@
uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
- if (!proc) {
+ if (proc == NULL) {
return;
}
diff --git a/plat/xilinx/versal_net/bl31_versal_net_setup.c b/plat/xilinx/versal_net/bl31_versal_net_setup.c
index 614d6d2..b38f394 100644
--- a/plat/xilinx/versal_net/bl31_versal_net_setup.c
+++ b/plat/xilinx/versal_net/bl31_versal_net_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2020, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2024, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved.
* Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
*
@@ -231,8 +231,6 @@
if (rc != 0) {
panic();
}
-
- console_switch_state(CONSOLE_FLAG_RUNTIME);
}
/*
diff --git a/plat/xilinx/versal_net/plat_psci_pm.c b/plat/xilinx/versal_net/plat_psci_pm.c
index 7260403..e5a5235 100644
--- a/plat/xilinx/versal_net/plat_psci_pm.c
+++ b/plat/xilinx/versal_net/plat_psci_pm.c
@@ -1,6 +1,6 @@
/*
* Copyright (c) 2022, Xilinx, Inc. All rights reserved.
- * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
+ * Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -38,7 +38,7 @@
}
proc = pm_get_proc(cpu_id);
- if (!proc) {
+ if (proc == NULL) {
return PSCI_E_INTERN_FAIL;
}
@@ -63,7 +63,7 @@
uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
- if (!proc) {
+ if (proc == NULL) {
return;
}
@@ -147,7 +147,7 @@
uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
- if (!proc) {
+ if (proc == NULL) {
return;
}
@@ -194,7 +194,7 @@
uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
- if (!proc) {
+ if (proc == NULL) {
return;
}
diff --git a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
index baf6717..0a34f72 100644
--- a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
+++ b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2021, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@@ -190,8 +190,6 @@
#endif
custom_runtime_setup();
-
- console_switch_state(CONSOLE_FLAG_RUNTIME);
}
/*
diff --git a/plat/xilinx/zynqmp/plat_psci.c b/plat/xilinx/zynqmp/plat_psci.c
index 9fd00db..1e7df05 100644
--- a/plat/xilinx/zynqmp/plat_psci.c
+++ b/plat/xilinx/zynqmp/plat_psci.c
@@ -44,7 +44,7 @@
}
proc = pm_get_proc(cpu_id);
- if (!proc) {
+ if (proc == NULL) {
return PSCI_E_INTERN_FAIL;
}
@@ -68,7 +68,7 @@
uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
- if (!proc) {
+ if (proc == NULL) {
return;
}
@@ -97,7 +97,7 @@
uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
- if (!proc) {
+ if (proc == NULL) {
return;
}
@@ -133,7 +133,7 @@
uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
- if (!proc) {
+ if (proc == NULL) {
return;
}
diff --git a/plat/xilinx/zynqmp/pm_service/zynqmp_pm_api_sys.c b/plat/xilinx/zynqmp/pm_service/zynqmp_pm_api_sys.c
index 6b42055..3d546b3 100644
--- a/plat/xilinx/zynqmp/pm_service/zynqmp_pm_api_sys.c
+++ b/plat/xilinx/zynqmp/pm_service/zynqmp_pm_api_sys.c
@@ -1,6 +1,6 @@
/*
* Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
- * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
+ * Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -272,6 +272,11 @@
uint32_t cpuid = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpuid);
+ if (proc == NULL) {
+ WARN("Failed to get proc %d\n", cpuid);
+ return PM_RET_ERROR_INTERNAL;
+ }
+
/*
* Do client specific suspend operations
* (e.g. set powerdown request bit)
diff --git a/tools/fiptool/plat_fiptool/st/stm32mp1/plat_def_uuid_config.c b/tools/fiptool/plat_fiptool/st/plat_def_uuid_config.c
similarity index 71%
rename from tools/fiptool/plat_fiptool/st/stm32mp1/plat_def_uuid_config.c
rename to tools/fiptool/plat_fiptool/st/plat_def_uuid_config.c
index 4df4144..8d3329f 100644
--- a/tools/fiptool/plat_fiptool/st/stm32mp1/plat_def_uuid_config.c
+++ b/tools/fiptool/plat_fiptool/st/plat_def_uuid_config.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2022-2023, STMicroelectronics - All Rights Reserved
+ * Copyright (c) 2022-2024, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -12,6 +12,11 @@
toc_entry_t plat_def_toc_entries[] = {
{
+ .name = "DDR_FW",
+ .uuid = UUID_DDR_FW,
+ .cmdline_name = "ddr-fw"
+ },
+ {
.name = "STM32MP CONFIG CERT",
.uuid = UUID_STM32MP_CONFIG_CERT,
.cmdline_name = "stm32mp-cfg-cert"
diff --git a/tools/fiptool/plat_fiptool/st/stm32mp1/plat_fiptool.mk b/tools/fiptool/plat_fiptool/st/plat_fiptool.mk
similarity index 71%
rename from tools/fiptool/plat_fiptool/st/stm32mp1/plat_fiptool.mk
rename to tools/fiptool/plat_fiptool/st/plat_fiptool.mk
index 0d69dbd..494715c 100644
--- a/tools/fiptool/plat_fiptool/st/stm32mp1/plat_fiptool.mk
+++ b/tools/fiptool/plat_fiptool/st/plat_fiptool.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2021-2022, STMicroelectronics - All Rights Reserved
+# Copyright (c) 2021-2024, STMicroelectronics - All Rights Reserved
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -9,14 +9,14 @@
# in the plat_def_toc_entries[].
PLAT_DEF_UUID_FILE_NAME := plat_def_uuid_config
-INCLUDE_PATHS += -I${PLAT_DIR}/include -I./
+INCLUDE_PATHS += -I../../plat/st/common/include -I./
PLAT_DEF_UUID := yes
ifeq (${PLAT_DEF_UUID},yes)
HOSTCCFLAGS += -DPLAT_DEF_FIP_UUID
-${PLAT_DEF_UUID_FILE_NAME}.o: plat_fiptool/st/stm32mp1/${PLAT_DEF_UUID_FILE_NAME}.c
+${PLAT_DEF_UUID_FILE_NAME}.o: plat_fiptool/st/${PLAT_DEF_UUID_FILE_NAME}.c
$(host-cc) -c ${CPPFLAGS} ${HOSTCCFLAGS} ${INCLUDE_PATHS} $< -o $@
PLAT_OBJECTS += ${PLAT_DEF_UUID_FILE_NAME}.o