commit 584c3f1a6baabda6c9d906528848b867c6d961a7
author Jiafei Pan <Jiafei.Pan@nxp.com> Fri Sep 10 19:01:15 2021 +0800
committer Jiafei Pan <Jiafei.Pan@nxp.com> Wed Sep 15 11:19:36 2021 +0800
tree 780382b4ff4b59d605ce071cea0cf73e871857de
parent def7edcfbfff5b82ffc6c18ed353cd31f5e9dda4

feat(plat/nxp/common): define default PSCI features if not defined

SoC code can define supported features, otherwise use default setting.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I0f11498c1f7558ff0ec2d9b344f3f7a4f5489ced

plat/nxp/common/psci/include/plat_psci.h

diff --git a/plat/nxp/common/psci/include/plat_psci.h b/plat/nxp/common/psci/include/plat_psci.h
index c81340c..45958b1 100644
--- a/plat/nxp/common/psci/include/plat_psci.h
+++ b/plat/nxp/common/psci/include/plat_psci.h
@@ -64,18 +64,53 @@
  *   value == 0x0, the soc code does not support this feature
  *   value != 0x0, the soc code supports this feature
  */
+#ifndef SOC_CORE_RELEASE
 #define SOC_CORE_RELEASE      0x1
+#endif
+
+#ifndef SOC_CORE_RESTART
 #define SOC_CORE_RESTART      0x1
+#endif
+
+#ifndef SOC_CORE_OFF
 #define SOC_CORE_OFF          0x1
+#endif
+
+#ifndef SOC_CORE_STANDBY
 #define SOC_CORE_STANDBY      0x1
+#endif
+
+#ifndef SOC_CORE_PWR_DWN
 #define SOC_CORE_PWR_DWN      0x1
+#endif
+
+#ifndef SOC_CLUSTER_STANDBY
 #define SOC_CLUSTER_STANDBY   0x1
+#endif
+
+#ifndef SOC_CLUSTER_PWR_DWN
 #define SOC_CLUSTER_PWR_DWN   0x1
+#endif
+
+#ifndef SOC_SYSTEM_STANDBY
 #define SOC_SYSTEM_STANDBY    0x1
+#endif
+
+#ifndef SOC_SYSTEM_PWR_DWN
 #define SOC_SYSTEM_PWR_DWN    0x1
+#endif
+
+#ifndef SOC_SYSTEM_OFF
 #define SOC_SYSTEM_OFF        0x1
+#endif
+
+#ifndef SOC_SYSTEM_RESET
 #define SOC_SYSTEM_RESET      0x1
+#endif
+
+#ifndef SOC_SYSTEM_RESET2
 #define SOC_SYSTEM_RESET2     0x1
+#endif
 
 #ifndef __ASSEMBLER__