diff --git a/drivers/st/crypto/stm32_hash.c b/drivers/st/crypto/stm32_hash.c
index e92f980..bd49324 100644
--- a/drivers/st/crypto/stm32_hash.c
+++ b/drivers/st/crypto/stm32_hash.c
@@ -10,6 +10,7 @@
 
 #include <arch_helpers.h>
 #include <common/debug.h>
+#include <common/sha_common_macros.h>
 #include <drivers/clk.h>
 #include <drivers/delay_timer.h>
 #include <drivers/st/stm32_hash.h>
@@ -62,15 +63,6 @@
 #define HASH_STR_NBLW_MASK		GENMASK(4, 0)
 #define HASH_STR_DCAL			BIT(8)
 
-#define MD5_DIGEST_SIZE			16U
-#define SHA1_DIGEST_SIZE		20U
-#define SHA224_DIGEST_SIZE		28U
-#define SHA256_DIGEST_SIZE		32U
-#define SHA384_DIGEST_SIZE		48U
-#define SHA512_224_DIGEST_SIZE		28U
-#define SHA512_256_DIGEST_SIZE		32U
-#define SHA512_DIGEST_SIZE		64U
-
 #define RESET_TIMEOUT_US_1MS		1000U
 #define HASH_TIMEOUT_US			10000U
 
diff --git a/include/common/sha_common_macros.h b/include/common/sha_common_macros.h
new file mode 100644
index 0000000..a419488
--- /dev/null
+++ b/include/common/sha_common_macros.h
@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2024, NVIDIA Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef SHA_COMMON_MACROS_H
+#define SHA_COMMON_MACROS_H
+
+#define MD5_DIGEST_SIZE                 16U
+#define SHA1_DIGEST_SIZE                20U
+#define SHA224_DIGEST_SIZE              28U
+#define SHA256_DIGEST_SIZE              32U
+#define SHA384_DIGEST_SIZE              48U
+#define SHA512_224_DIGEST_SIZE          28U
+#define SHA512_256_DIGEST_SIZE          32U
+#define SHA512_DIGEST_SIZE              64U
+
+#endif /* SHA_COMMON_MACROS_H */
diff --git a/include/drivers/measured_boot/event_log/tcg.h b/include/drivers/measured_boot/event_log/tcg.h
index 4ac2c2f..653f9c2 100644
--- a/include/drivers/measured_boot/event_log/tcg.h
+++ b/include/drivers/measured_boot/event_log/tcg.h
@@ -8,6 +8,7 @@
 #define TCG_H
 
 #include <stdint.h>
+#include <common/sha_common_macros.h>
 
 #define TCG_ID_EVENT_SIGNATURE_03	"Spec ID Event03"
 #define TCG_STARTUP_LOCALITY_SIGNATURE	"StartupLocality"
@@ -66,12 +67,6 @@
 #define PLATFORM_CLASS_CLIENT   0
 #define PLATFORM_CLASS_SERVER   1
 
-/* SHA digest sizes in bytes */
-#define SHA1_DIGEST_SIZE	20
-#define SHA256_DIGEST_SIZE	32
-#define SHA384_DIGEST_SIZE	48
-#define SHA512_DIGEST_SIZE	64
-
 enum {
 	/*
 	 * SRTM, BIOS, Host Platform Extensions, Embedded
diff --git a/include/drivers/nxp/crypto/caam/hash.h b/include/drivers/nxp/crypto/caam/hash.h
index 9136dca..6201d23 100644
--- a/include/drivers/nxp/crypto/caam/hash.h
+++ b/include/drivers/nxp/crypto/caam/hash.h
@@ -9,6 +9,7 @@
 #define __HASH_H__
 
 #include <stdbool.h>
+#include <common/sha_common_macros.h>
 
 /* List of hash algorithms */
 enum hash_algo {
@@ -16,9 +17,6 @@
 	SHA256
 };
 
-/* number of bytes in the SHA256-256 digest */
-#define SHA256_DIGEST_SIZE 32
-
 /*
  * number of words in the digest - Digest is kept internally
  * as 8 32-bit words
diff --git a/include/services/rmmd_svc.h b/include/services/rmmd_svc.h
index 4615ffb..635c28e 100644
--- a/include/services/rmmd_svc.h
+++ b/include/services/rmmd_svc.h
@@ -7,6 +7,7 @@
 #ifndef RMMD_SVC_H
 #define RMMD_SVC_H
 
+#include <common/sha_common_macros.h>
 #include <lib/smccc.h>
 #include <lib/utils_def.h>
 
@@ -96,11 +97,6 @@
 #define RMI_SUCCESS			0
 #define RMI_ERROR_INPUT			1
 
-/* Acceptable SHA sizes for Challenge object */
-#define SHA256_DIGEST_SIZE	32U
-#define SHA384_DIGEST_SIZE	48U
-#define SHA512_DIGEST_SIZE	64U
-
 /*
  * Retrieve Realm attestation key from EL3. Only P-384 ECC curve key is
  * supported. The arguments to this SMC are :