tree 4f9e9bb6febca19e95b55f4b9b03caca5520a15a
parent d4d7167c3cc5b47565bcc84b57dea297f2bd0ff5
parent 744043c5e13a64009eb7680332b8ca467f61c38a
author Bipin Ravi <bipin.ravi@arm.com> 1681506092 +0200
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> 1681506092 +0200

Merge "fix(cpus): use hint instruction for "tsb csync"" into integration