commit 57a6cbae20df7a7cbb994672e7845a20159bbe70
author Bipin Ravi <bipin.ravi@arm.com> Fri Apr 14 23:01:32 2023 +0200
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> Fri Apr 14 23:01:32 2023 +0200
tree 4f9e9bb6febca19e95b55f4b9b03caca5520a15a
parent d4d7167c3cc5b47565bcc84b57dea297f2bd0ff5
parent 744043c5e13a64009eb7680332b8ca467f61c38a

Merge "fix(cpus): use hint instruction for "tsb csync"" into integration

lib/cpus/aarch64/cortex_a510.S

diff --git a/lib/cpus/aarch64/cortex_a510.S b/lib/cpus/aarch64/cortex_a510.S
index 886e1f3..e10ebb0 100644
--- a/lib/cpus/aarch64/cortex_a510.S
+++ b/lib/cpus/aarch64/cortex_a510.S
@@ -382,7 +382,11 @@
 	bl	check_errata_2684597
 	cbz	x0, 2f
 
-	tsb	csync
+	/*
+	 * Many assemblers do not yet understand the "tsb csync" mnemonic,
+	 * so use the equivalent hint instruction.
+	 */
+	hint	#18			/* tsb csync */
 2:
 	ret	x17
 endfunc errata_cortex_a510_2684597_wa