PSCI: Fix MISRA defects in ON/OFF/SUSPEND/SYSTEM_OFF
Fix violations of MISRA C-2012 Rules 8.13, 10.1, 10.3, 17.7 and 20.7.
Change-Id: I6f45a1069b742aebf9e1d6a403717b1522083f51
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
diff --git a/lib/psci/psci_on.c b/lib/psci/psci_on.c
index 325346e..f38900c 100644
--- a/lib/psci/psci_on.c
+++ b/lib/psci/psci_on.c
@@ -55,22 +55,22 @@
* platform handler as it can return error.
******************************************************************************/
int psci_cpu_on_start(u_register_t target_cpu,
- entry_point_info_t *ep)
+ const entry_point_info_t *ep)
{
int rc;
- unsigned int target_idx = plat_core_pos_by_mpidr(target_cpu);
aff_info_state_t target_aff_state;
+ int target_idx = plat_core_pos_by_mpidr(target_cpu);
/* Calling function must supply valid input arguments */
- assert((int) target_idx >= 0);
+ assert(target_idx >= 0);
assert(ep != NULL);
/*
* This function must only be called on platforms where the
* CPU_ON platform hooks have been implemented.
*/
- assert(psci_plat_pm_ops->pwr_domain_on &&
- psci_plat_pm_ops->pwr_domain_on_finish);
+ assert((psci_plat_pm_ops->pwr_domain_on != NULL) &&
+ (psci_plat_pm_ops->pwr_domain_on_finish != NULL));
/* Protect against multiple CPUs trying to turn ON the same target CPU */
psci_spin_lock_cpu(target_idx);
@@ -91,7 +91,8 @@
* target CPUs shutdown was not seen by the current CPU's cluster. And
* so the cache may contain stale data for the target CPU.
*/
- flush_cpu_data_by_index(target_idx, psci_svc_cpu_data.aff_info_state);
+ flush_cpu_data_by_index((unsigned int)target_idx,
+ psci_svc_cpu_data.aff_info_state);
rc = cpu_on_validate_state(psci_get_aff_info_state_by_idx(target_idx));
if (rc != PSCI_E_SUCCESS)
goto exit;
@@ -101,7 +102,7 @@
* to let it do any bookeeping. If the handler encounters an error, it's
* expected to assert within
*/
- if (psci_spd_pm && psci_spd_pm->svc_on)
+ if ((psci_spd_pm != NULL) && (psci_spd_pm->svc_on != NULL))
psci_spd_pm->svc_on(target_cpu);
/*
@@ -110,7 +111,8 @@
* turned OFF.
*/
psci_set_aff_info_state_by_idx(target_idx, AFF_STATE_ON_PENDING);
- flush_cpu_data_by_index(target_idx, psci_svc_cpu_data.aff_info_state);
+ flush_cpu_data_by_index((unsigned int)target_idx,
+ psci_svc_cpu_data.aff_info_state);
/*
* The cache line invalidation by the target CPU after setting the
@@ -122,9 +124,11 @@
if (target_aff_state != AFF_STATE_ON_PENDING) {
assert(target_aff_state == AFF_STATE_OFF);
psci_set_aff_info_state_by_idx(target_idx, AFF_STATE_ON_PENDING);
- flush_cpu_data_by_index(target_idx, psci_svc_cpu_data.aff_info_state);
+ flush_cpu_data_by_index((unsigned int)target_idx,
+ psci_svc_cpu_data.aff_info_state);
- assert(psci_get_aff_info_state_by_idx(target_idx) == AFF_STATE_ON_PENDING);
+ assert(psci_get_aff_info_state_by_idx(target_idx) ==
+ AFF_STATE_ON_PENDING);
}
/*
@@ -136,15 +140,16 @@
* steps to power on.
*/
rc = psci_plat_pm_ops->pwr_domain_on(target_cpu);
- assert(rc == PSCI_E_SUCCESS || rc == PSCI_E_INTERN_FAIL);
+ assert((rc == PSCI_E_SUCCESS) || (rc == PSCI_E_INTERN_FAIL));
if (rc == PSCI_E_SUCCESS)
/* Store the re-entry information for the non-secure world. */
- cm_init_context_by_index(target_idx, ep);
+ cm_init_context_by_index((unsigned int)target_idx, ep);
else {
/* Restore the state on error. */
psci_set_aff_info_state_by_idx(target_idx, AFF_STATE_OFF);
- flush_cpu_data_by_index(target_idx, psci_svc_cpu_data.aff_info_state);
+ flush_cpu_data_by_index((unsigned int)target_idx,
+ psci_svc_cpu_data.aff_info_state);
}
exit:
@@ -157,8 +162,7 @@
* are called by the common finisher routine in psci_common.c. The `state_info`
* is the psci_power_state from which this CPU has woken up from.
******************************************************************************/
-void psci_cpu_on_finish(unsigned int cpu_idx,
- psci_power_state_t *state_info)
+void psci_cpu_on_finish(int cpu_idx, const psci_power_state_t *state_info)
{
/*
* Plat. management: Perform the platform specific actions
@@ -199,7 +203,7 @@
* Dispatcher to let it do any bookeeping. If the handler encounters an
* error, it's expected to assert within
*/
- if (psci_spd_pm && psci_spd_pm->svc_on_finish)
+ if ((psci_spd_pm != NULL) && (psci_spd_pm->svc_on_finish != NULL))
psci_spd_pm->svc_on_finish(0);
PUBLISH_EVENT(psci_cpu_on_finish);