PSCI: Update comment on MMU disablement
The MMU is not disabled in this path, update the comment to
reflect this. Also clarify that both paths call prepare_cpu_pwr_dwn(),
but the second path does stack cache maintenance.
Signed-off-by: Andrew F. Davis <afd@ti.com>
diff --git a/lib/psci/psci_common.c b/lib/psci/psci_common.c
index adce843..3bc03c8 100644
--- a/lib/psci/psci_common.c
+++ b/lib/psci/psci_common.c
@@ -948,21 +948,18 @@
/*
* With hardware-assisted coherency, the CPU drivers only initiate the
* power down sequence, without performing cache-maintenance operations
- * in software. Data caches and MMU remain enabled both before and after
- * this call.
+ * in software. Data caches enabled both before and after this call.
*/
prepare_cpu_pwr_dwn(power_level);
#else
/*
* Without hardware-assisted coherency, the CPU drivers disable data
- * caches and MMU, then perform cache-maintenance operations in
- * software.
+ * caches, then perform cache-maintenance operations in software.
*
- * We ought to call prepare_cpu_pwr_dwn() to initiate power down
- * sequence. We currently have data caches and MMU enabled, but the
- * function will return with data caches and MMU disabled. We must
- * ensure that the stack memory is flushed out to memory before we start
- * popping from it again.
+ * This also calls prepare_cpu_pwr_dwn() to initiate power down
+ * sequence, but that function will return with data caches disabled.
+ * We must ensure that the stack memory is flushed out to memory before
+ * we start popping from it again.
*/
psci_do_pwrdown_cache_maintenance(power_level);
#endif