Rename Cortex-Ares to Neoverse N1
Change-Id: Ideb49011da35f39ff1959be6f5015fa212ca2b6b
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
diff --git a/plat/arm/board/fvp/platform.mk b/plat/arm/board/fvp/platform.mk
index 42a9095..8e69399 100644
--- a/plat/arm/board/fvp/platform.mk
+++ b/plat/arm/board/fvp/platform.mk
@@ -103,7 +103,7 @@
lib/cpus/aarch64/cortex_a73.S \
lib/cpus/aarch64/cortex_a75.S \
lib/cpus/aarch64/cortex_a76.S \
- lib/cpus/aarch64/cortex_ares.S \
+ lib/cpus/aarch64/neoverse_n1.S \
lib/cpus/aarch64/cortex_deimos.S
else
FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S
@@ -214,7 +214,7 @@
ifeq (${ENABLE_AMU},1)
BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \
- lib/cpus/aarch64/cortex_ares_pubsub.c \
+ lib/cpus/aarch64/neoverse_n1_pubsub.c \
lib/cpus/aarch64/cpuamu.c \
lib/cpus/aarch64/cpuamu_helpers.S
endif
diff --git a/plat/arm/board/n1sdp/aarch64/n1sdp_helper.S b/plat/arm/board/n1sdp/aarch64/n1sdp_helper.S
index 6eb01aa..c03185a 100644
--- a/plat/arm/board/n1sdp/aarch64/n1sdp_helper.S
+++ b/plat/arm/board/n1sdp/aarch64/n1sdp_helper.S
@@ -1,12 +1,12 @@
/*
- * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <arch.h>
#include <asm_macros.S>
-#include <cortex_ares.h>
+#include <neoverse_n1.h>
#include <cpu_macros.S>
#include <platform_def.h>
@@ -58,17 +58,17 @@
*/
func plat_reset_handler
- jump_if_cpu_midr CORTEX_ARES_MIDR, ARES
+ jump_if_cpu_midr NEOVERSE_N1_MIDR, N1
ret
/* -----------------------------------------------------
* Disable CPU power down bit in power control register
* -----------------------------------------------------
*/
-ARES:
- mrs x0, CORTEX_ARES_CPUPWRCTLR_EL1
- bic x0, x0, #CORTEX_ARES_CORE_PWRDN_EN_MASK
- msr CORTEX_ARES_CPUPWRCTLR_EL1, x0
+N1:
+ mrs x0, NEOVERSE_N1_CPUPWRCTLR_EL1
+ bic x0, x0, #NEOVERSE_N1_CORE_PWRDN_EN_MASK
+ msr NEOVERSE_N1_CPUPWRCTLR_EL1, x0
isb
ret
endfunc plat_reset_handler
diff --git a/plat/arm/board/n1sdp/platform.mk b/plat/arm/board/n1sdp/platform.mk
index 2b68f65..653d081 100644
--- a/plat/arm/board/n1sdp/platform.mk
+++ b/plat/arm/board/n1sdp/platform.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -12,7 +12,7 @@
PLAT_INCLUDES := -I${N1SDP_BASE}/include
-N1SDP_CPU_SOURCES := lib/cpus/aarch64/cortex_ares.S
+N1SDP_CPU_SOURCES := lib/cpus/aarch64/neoverse_n1.S
N1SDP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
diff --git a/plat/arm/board/sgiclarka/platform.mk b/plat/arm/board/sgiclarka/platform.mk
index 1a8b157..81e416e 100644
--- a/plat/arm/board/sgiclarka/platform.mk
+++ b/plat/arm/board/sgiclarka/platform.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -10,7 +10,7 @@
PLAT_INCLUDES += -I${SGICLARKA_BASE}/include/
-SGI_CPU_SOURCES := lib/cpus/aarch64/cortex_ares.S
+SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_n1.S
BL1_SOURCES += ${SGI_CPU_SOURCES}
diff --git a/plat/arm/css/sgi/aarch64/sgi_helper.S b/plat/arm/css/sgi/aarch64/sgi_helper.S
index d79f1aa..b80903d 100644
--- a/plat/arm/css/sgi/aarch64/sgi_helper.S
+++ b/plat/arm/css/sgi/aarch64/sgi_helper.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -8,7 +8,7 @@
#include <asm_macros.S>
#include <platform_def.h>
#include <cortex_a75.h>
-#include <cortex_ares.h>
+#include <neoverse_n1.h>
#include <cpu_macros.S>
.globl plat_arm_calc_core_pos
@@ -59,7 +59,7 @@
*/
func plat_reset_handler
jump_if_cpu_midr CORTEX_A75_MIDR, A75
- jump_if_cpu_midr CORTEX_ARES_MIDR, ARES
+ jump_if_cpu_midr NEOVERSE_N1_MIDR, N1
ret
/* -----------------------------------------------------
@@ -73,10 +73,10 @@
isb
ret
-ARES:
- mrs x0, CORTEX_ARES_CPUPWRCTLR_EL1
- bic x0, x0, #CORTEX_ARES_CORE_PWRDN_EN_MASK
- msr CORTEX_ARES_CPUPWRCTLR_EL1, x0
+N1:
+ mrs x0, NEOVERSE_N1_CPUPWRCTLR_EL1
+ bic x0, x0, #NEOVERSE_N1_CORE_PWRDN_EN_MASK
+ msr NEOVERSE_N1_CPUPWRCTLR_EL1, x0
isb
ret
endfunc plat_reset_handler