| commit | 55e2b0c0d5f2e481bb94283cba53e309611ce674 | [log] [tgz] |
|---|---|---|
| author | lakshmi Kailasanathan <lakshmi.Kailasanathan@arm.com> | Fri Apr 17 12:52:19 2020 +0100 |
| committer | lakshmi Kailasanathan <lakshmi.Kailasanathan@arm.com> | Fri Apr 17 21:12:15 2020 +0100 |
| tree | f8bc0bd5cdde1871af5bd9e01b0494d1ff6a6b5d | |
| parent | 1c277c8f76bf3b6aad29f549c5b3c1e897ad7cb0 [diff] |
fdts: a5ds: Fix for the system timer issue. A5DS FPGA system timer clock frequency is 7.5Mhz. The dt is file updated inline with the hardware clock frequency. Change-Id: I3f6c2e0d4a7b293175a42cf398a8730448504af9 Signed-off-by: lakshmi Kailasanathan <lakshmi.Kailasanathan@arm.com>