fix instruction address range limitation
For the adr instruction, it require the label's offset from the
address of this instruction must be in the range +/-1MB. If the
option "BL2_IN_XIP_MEM" is set to '1', in some cases, BL2's RW
memory will not in the range of +/-1MB from BL2's RO memory region.
so we need to use ldr instruction to cover this case.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
diff --git a/include/common/aarch64/el3_common_macros.S b/include/common/aarch64/el3_common_macros.S
index e85249c..d5f527a 100644
--- a/include/common/aarch64/el3_common_macros.S
+++ b/include/common/aarch64/el3_common_macros.S
@@ -278,8 +278,8 @@
* an earlier boot loader stage.
* -------------------------------------------------------------
*/
- adr x0, __RW_START__
- adr x1, __RW_END__
+ ldr x0, =__RW_START__
+ ldr x1, =__RW_END__
sub x1, x1, x0
bl inv_dcache_range
#endif