commit | 59400a481a6a21919f39a4d46359c9b362072065 | [log] [tgz] |
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author | Loh Tien Hock <tien.hock.loh@intel.com> | Mon Feb 04 16:17:24 2019 +0800 |
committer | Loh Tien Hock <tien.hock.loh@intel.com> | Mon Feb 04 16:17:24 2019 +0800 |
tree | 37e91b6220d389baf4276e9c0ea05fea10c284f4 | |
parent | b9c283663a5575d97dc94bbd7ac0282f8e89a3ee [diff] |
plat: intel: Add BL2 support for Stratix 10 SoC This adds BL2 support for Intel Stratix 10 SoC FPGA. Functionality includes: - Release and setup peripherals from reset - Calibrate DDR - ECC DDR Scrubbing - Load FIP (bl31 and bl33) Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>