Simplify interface to TZC-400 driver
The TZC-400 driver previously allowed the possibility of multiple
controller instances to be present in the same executable. This
was unnecessary since there will only ever be one instance.
This change simplifies the tzc_init() function to only take the
base address argument needed by implementation, conforming to the
driver initialization model of other drivers. It also hides some
of the implementation details that were previously exposed by the
API.
The FVP port has been updated accordingly.
THIS CHANGE REQUIRES ALL PLATFORM PORTS THAT USE THE TZC-400
DRIVER TO BE UPDATED
Fixes ARM-software/tf-issues#181
Change-Id: I7b721edf947064989958d8f457d6462d92e742c8
diff --git a/plat/fvp/fvp_security.c b/plat/fvp/fvp_security.c
index 0adbbc5..06ab575 100644
--- a/plat/fvp/fvp_security.c
+++ b/plat/fvp/fvp_security.c
@@ -46,8 +46,6 @@
*/
void fvp_security_setup(void)
{
- tzc_instance_t controller;
-
/*
* The Base FVP has a TrustZone address space controller, the Foundation
* FVP does not. Trying to program the device on the foundation FVP will
@@ -71,9 +69,7 @@
* - Provide base address of device on platform.
* - Provide width of ACE-Lite IDs on platform.
*/
- controller.base = TZC400_BASE;
- controller.aid_width = FVP_AID_WIDTH;
- tzc_init(&controller);
+ tzc_init(TZC400_BASE);
/*
* Currently only filters 0 and 2 are connected on Base FVP.
@@ -87,7 +83,7 @@
*/
/* Disable all filters before programming. */
- tzc_disable_filters(&controller);
+ tzc_disable_filters();
/*
* Allow only non-secure access to all DRAM to supported devices.
@@ -101,7 +97,7 @@
*/
/* Set to cover the first block of DRAM */
- tzc_configure_region(&controller, FILTER_SHIFT(0), 1,
+ tzc_configure_region(FILTER_SHIFT(0), 1,
DRAM1_BASE, DRAM1_END - DRAM1_SEC_SIZE,
TZC_REGION_S_NONE,
TZC_REGION_ACCESS_RDWR(FVP_NSAID_DEFAULT) |
@@ -111,13 +107,13 @@
TZC_REGION_ACCESS_RDWR(FVP_NSAID_VIRTIO_OLD));
/* Set to cover the secure reserved region */
- tzc_configure_region(&controller, FILTER_SHIFT(0), 3,
+ tzc_configure_region(FILTER_SHIFT(0), 3,
(DRAM1_END - DRAM1_SEC_SIZE) + 1 , DRAM1_END,
TZC_REGION_S_RDWR,
0x0);
/* Set to cover the second block of DRAM */
- tzc_configure_region(&controller, FILTER_SHIFT(0), 2,
+ tzc_configure_region(FILTER_SHIFT(0), 2,
DRAM2_BASE, DRAM2_END, TZC_REGION_S_NONE,
TZC_REGION_ACCESS_RDWR(FVP_NSAID_DEFAULT) |
TZC_REGION_ACCESS_RDWR(FVP_NSAID_PCI) |
@@ -130,8 +126,8 @@
* options we have are for access errors to occur quietly or to
* cause an exception. We choose to cause an exception.
*/
- tzc_set_action(&controller, TZC_ACTION_ERR);
+ tzc_set_action(TZC_ACTION_ERR);
/* Enable filters. */
- tzc_enable_filters(&controller);
+ tzc_enable_filters();
}