Merge "docs: update build tool prerequisites" into integration
diff --git a/docs/perf/psci-performance-juno.rst b/docs/perf/psci-performance-juno.rst
index 43a7d59..9640a24 100644
--- a/docs/perf/psci-performance-juno.rst
+++ b/docs/perf/psci-performance-juno.rst
@@ -31,8 +31,8 @@
 
 The following source trees and binaries were used:
 
-- `TF-A v2.11-rc0`_
-- `TFTF v2.11-rc0`_
+- `TF-A v2.12-rc0`_
+- `TFTF v2.12-rc0`_
 
 Please see the Runtime Instrumentation :ref:`Testing Methodology
 <Runtime Instrumentation Methodology>`
@@ -73,6 +73,25 @@
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
 .. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in
+        parallel (v2.12)
+
+    +---------+------+-------------------+------------------+--------------------+
+    | Cluster | Core |     Powerdown     |      Wakeup      |    Cache Flush     |
+    +---------+------+-------------------+------------------+--------------------+
+    |    0    |  0   |  244.52 (-65.43%) | 26.92 (-32.60%)  |   5.54 (-96.70%)   |
+    +---------+------+-------------------+------------------+--------------------+
+    |    0    |  1   | 526.18 (+105.12%) |      416.1       | 138.52 (+2011.59%) |
+    +---------+------+-------------------+------------------+--------------------+
+    |    1    |  0   |       104.34      | 27.02 (-94.62%)  |        5.32        |
+    +---------+------+-------------------+------------------+--------------------+
+    |    1    |  1   |       384.98      | 23.06 (-85.40%)  |        4.48        |
+    +---------+------+-------------------+------------------+--------------------+
+    |    1    |  2   |  812.44 (+45.94%) |      126.78      |        4.54        |
+    +---------+------+-------------------+------------------+--------------------+
+    |    1    |  3   |       986.84      | 77.22 (+176.58%) |       79.76        |
+    +---------+------+-------------------+------------------+--------------------+
+
+.. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in
         parallel (v2.11)
 
     +---------+------+-------------------+--------------------+-------------+
@@ -92,23 +111,23 @@
     +---------+------+-------------------+--------------------+-------------+
 
 .. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in
-        parallel (v2.10)
+        serial (v2.12)
 
-    +---------+------+-------------------+--------+-------------+
-    | Cluster | Core |     Powerdown     | Wakeup | Cache Flush |
-    +---------+------+-------------------+--------+-------------+
-    |    0    |  0   | 242.66 (+132.03%) | 245.1  |     5.4     |
-    +---------+------+-------------------+--------+-------------+
-    |    0    |  1   |  522.08 (+35.87%) | 26.24  |    138.32   |
-    +---------+------+-------------------+--------+-------------+
-    |    1    |  0   |  104.36 (-57.33%) |  27.1  |     5.32    |
-    +---------+------+-------------------+--------+-------------+
-    |    1    |  1   |  382.56 (-42.95%) | 23.34  |     4.42    |
-    +---------+------+-------------------+--------+-------------+
-    |    1    |  2   |       807.74      | 271.54 |     4.64    |
-    +---------+------+-------------------+--------+-------------+
-    |    1    |  3   |       981.36      | 221.8  |    79.48    |
-    +---------+------+-------------------+--------+-------------+
+    +---------+------+-----------+-----------------+-------------+
+    | Cluster | Core | Powerdown |      Wakeup     | Cache Flush |
+    +---------+------+-----------+-----------------+-------------+
+    |    0    |  0   |   236.36  | 27.94 (-31.52%) |    138.0    |
+    +---------+------+-----------+-----------------+-------------+
+    |    0    |  1   |   236.58  | 27.86 (-31.72%) |    138.2    |
+    +---------+------+-----------+-----------------+-------------+
+    |    1    |  0   |   280.68  |      27.02      |     77.6    |
+    +---------+------+-----------+-----------------+-------------+
+    |    1    |  1   |   101.4   |      22.52      |     4.42    |
+    +---------+------+-----------+-----------------+-------------+
+    |    1    |  2   |   100.92  |      22.68      |     4.4     |
+    +---------+------+-----------+-----------------+-------------+
+    |    1    |  3   |   100.96  |      22.54      |     4.38    |
+    +---------+------+-----------+-----------------+-------------+
 
 .. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in
         serial (v2.11)
@@ -129,29 +148,31 @@
     |    1    |  3   |   107.52  | 21.86  |     4.46    |
     +---------+------+-----------+--------+-------------+
 
-.. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in
-        serial (v2.10)
-
-    +---------+------+-----------+--------+-------------+
-    | Cluster | Core | Powerdown | Wakeup | Cache Flush |
-    +---------+------+-----------+--------+-------------+
-    |    0    |  0   |   236.84  |  27.1  |    138.36   |
-    +---------+------+-----------+--------+-------------+
-    |    0    |  1   |   236.96  |  27.1  |    138.32   |
-    +---------+------+-----------+--------+-------------+
-    |    1    |  0   |   280.06  | 26.94  |     77.5    |
-    +---------+------+-----------+--------+-------------+
-    |    1    |  1   |   100.76  | 23.42  |     4.36    |
-    +---------+------+-----------+--------+-------------+
-    |    1    |  2   |   100.02  | 23.42  |     4.44    |
-    +---------+------+-----------+--------+-------------+
-    |    1    |  3   |   100.08  |  23.2  |     4.4     |
-    +---------+------+-----------+--------+-------------+
-
 ``CPU_SUSPEND`` to power level 0
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
 .. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in
+        parallel (v2.12)
+
+    +--------------------------------------------------------------------+
+    |                  test_rt_instr_cpu_susp_parallel                   |
+    +---------+------+-------------------+-----------------+-------------+
+    | Cluster | Core |     Powerdown     |      Wakeup     | Cache Flush |
+    +---------+------+-------------------+-----------------+-------------+
+    |    0    |  0   |       663.12      | 19.66 (-39.21%) |     8.26    |
+    +---------+------+-------------------+-----------------+-------------+
+    |    0    |  1   |       804.18      | 19.24 (-40.65%) |     8.1     |
+    +---------+------+-------------------+-----------------+-------------+
+    |    1    |  0   |  105.58 (-58.80%) |      19.68      |     7.42    |
+    +---------+------+-------------------+-----------------+-------------+
+    |    1    |  1   |  245.02 (-39.67%) |       19.8      |     6.82    |
+    +---------+------+-------------------+-----------------+-------------+
+    |    1    |  2   |  383.82 (-30.83%) |      18.84      |     7.06    |
+    +---------+------+-------------------+-----------------+-------------+
+    |    1    |  3   | 523.36 (+391.23%) |       19.0      |     7.3     |
+    +---------+------+-------------------+-----------------+-------------+
+
+.. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in
         parallel (v2.11)
 
     +---------+------+-------------------+--------+-------------+
@@ -170,24 +191,23 @@
     |    1    |  3   |  408.16 (+66.94%) | 19.82  |     7.38    |
     +---------+------+-------------------+--------+-------------+
 
-.. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in
-        parallel (v2.10)
+.. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in serial (v2.12)
 
-    +---------+------+-------------------+--------+-------------+
-    | Cluster | Core |     Powerdown     | Wakeup | Cache Flush |
-    +---------+------+-------------------+--------+-------------+
-    |    0    |  0   |       801.04      | 18.66  |     8.22    |
-    +---------+------+-------------------+--------+-------------+
-    |    0    |  1   |       661.28      | 19.08  |     7.88    |
-    +---------+------+-------------------+--------+-------------+
-    |    1    |  0   |  105.9 (-72.51%)  |  20.3  |     7.58    |
-    +---------+------+-------------------+--------+-------------+
-    |    1    |  1   | 383.58 (+261.32%) |  20.4  |     7.42    |
-    +---------+------+-------------------+--------+-------------+
-    |    1    |  2   |       523.52      |  20.1  |     7.74    |
-    +---------+------+-------------------+--------+-------------+
-    |    1    |  3   |       244.5       | 20.16  |     7.56    |
-    +---------+------+-------------------+--------+-------------+
+    +---------+------+-----------+-----------------+-------------+
+    | Cluster | Core | Powerdown |      Wakeup     | Cache Flush |
+    +---------+------+-----------+-----------------+-------------+
+    |    0    |  0   |   100.04  | 20.32 (-38.50%) |     5.62    |
+    +---------+------+-----------+-----------------+-------------+
+    |    0    |  1   |   99.78   |  20.6 (-36.10%) |     5.42    |
+    +---------+------+-----------+-----------------+-------------+
+    |    1    |  0   |   278.28  |      19.52      |     4.32    |
+    +---------+------+-----------+-----------------+-------------+
+    |    1    |  1   |    97.3   |      19.44      |     4.26    |
+    +---------+------+-----------+-----------------+-------------+
+    |    1    |  2   |   97.56   |      19.52      |     4.32    |
+    +---------+------+-----------+-----------------+-------------+
+    |    1    |  3   |   97.52   |      19.46      |     4.26    |
+    +---------+------+-----------+-----------------+-------------+
 
 .. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in serial (v2.11)
 
@@ -207,30 +227,30 @@
     |    1    |  3   |   104.32  | 19.18  |     4.34    |
     +---------+------+-----------+--------+-------------+
 
-.. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in serial (v2.10)
-
-    +---------+------+-----------+--------+-------------+
-    | Cluster | Core | Powerdown | Wakeup | Cache Flush |
-    +---------+------+-----------+--------+-------------+
-    |    0    |  0   |   99.84   | 18.86  |     5.54    |
-    +---------+------+-----------+--------+-------------+
-    |    0    |  1   |   100.2   | 18.82  |     5.66    |
-    +---------+------+-----------+--------+-------------+
-    |    1    |  0   |   278.12  | 20.56  |     4.48    |
-    +---------+------+-----------+--------+-------------+
-    |    1    |  1   |   96.68   | 20.62  |     4.3     |
-    +---------+------+-----------+--------+-------------+
-    |    1    |  2   |   96.94   | 20.14  |     4.42    |
-    +---------+------+-----------+--------+-------------+
-    |    1    |  3   |   96.68   | 20.46  |     4.32    |
-    +---------+------+-----------+--------+-------------+
-
 ``CPU_OFF`` on all non-lead CPUs
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
 ``CPU_OFF`` on all non-lead CPUs in sequence then, ``CPU_SUSPEND`` on the lead
 core to the deepest power level.
 
+.. table:: ``CPU_OFF`` latencies (µs) on all non-lead CPUs (v2.12)
+
+    +---------+------+-----------+-----------------+-------------+
+    | Cluster | Core | Powerdown |      Wakeup     | Cache Flush |
+    +---------+------+-----------+-----------------+-------------+
+    |    0    |  0   |   236.3   | 30.88 (-29.30%) |    137.76   |
+    +---------+------+-----------+-----------------+-------------+
+    |    0    |  1   |   236.66  |  30.5 (-29.23%) |    138.02   |
+    +---------+------+-----------+-----------------+-------------+
+    |    1    |  0   |   175.9   |       27.0      |    77.86    |
+    +---------+------+-----------+-----------------+-------------+
+    |    1    |  1   |   100.96  |      27.56      |     4.26    |
+    +---------+------+-----------+-----------------+-------------+
+    |    1    |  2   |   101.04  |      26.48      |     4.38    |
+    +---------+------+-----------+-----------------+-------------+
+    |    1    |  3   |   101.08  |      26.74      |     4.4     |
+    +---------+------+-----------+-----------------+-------------+
+
 .. table:: ``CPU_OFF`` latencies (µs) on all non-lead CPUs (v2.11)
 
     +---------+------+-----------+--------+-------------+
@@ -249,29 +269,27 @@
     |    1    |  3   |   107.74  |  25.8  |     4.34    |
     +---------+------+-----------+--------+-------------+
 
-.. table:: ``CPU_OFF`` latencies (µs) on all non-lead CPUs (v2.10)
-
-    +---------------------------------------------------+
-    |       test_rt_instr_cpu_off_serial (latest)       |
-    +---------+------+-----------+--------+-------------+
-    | Cluster | Core | Powerdown | Wakeup | Cache Flush |
-    +---------+------+-----------+--------+-------------+
-    |    0    |  0   |   236.04  | 30.02  |    137.9    |
-    +---------+------+-----------+--------+-------------+
-    |    0    |  1   |   235.38  |  29.7  |    137.72   |
-    +---------+------+-----------+--------+-------------+
-    |    1    |  0   |   175.18  | 26.96  |    77.26    |
-    +---------+------+-----------+--------+-------------+
-    |    1    |  1   |   100.56  | 28.34  |     4.32    |
-    +---------+------+-----------+--------+-------------+
-    |    1    |  2   |   100.38  | 26.82  |     4.3     |
-    +---------+------+-----------+--------+-------------+
-    |    1    |  3   |   100.86  | 26.98  |     4.42    |
-    +---------+------+-----------+--------+-------------+
-
 ``CPU_VERSION`` in parallel
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
+.. table:: ``CPU_VERSION`` latency (µs) in parallel on all cores (2.12)
+
+    +-------------+--------+--------------+
+    |   Cluster   |  Core  |   Latency    |
+    +-------------+--------+--------------+
+    |      0      |   0    |     1.0      |
+    +-------------+--------+--------------+
+    |      0      |   1    |     1.02     |
+    +-------------+--------+--------------+
+    |      1      |   0    |     0.52     |
+    +-------------+--------+--------------+
+    |      1      |   1    |     0.94     |
+    +-------------+--------+--------------+
+    |      1      |   2    |     0.94     |
+    +-------------+--------+--------------+
+    |      1      |   3    |     0.92     |
+    +-------------+--------+--------------+
+
 .. table:: ``CPU_VERSION`` latency (µs) in parallel on all cores (2.11)
 
     +-------------+--------+--------------+
@@ -290,24 +308,6 @@
     |      1      |   3    |     1.02     |
     +-------------+--------+--------------+
 
-.. table:: ``CPU_VERSION`` latency (µs) in parallel on all cores (2.10)
-
-    +-------------+--------+----------------------+
-    |   Cluster   |  Core  |       Latency        |
-    +-------------+--------+----------------------+
-    |      0      |   0    |    1.1 (-25.68%)     |
-    +-------------+--------+----------------------+
-    |      0      |   1    |         1.06         |
-    +-------------+--------+----------------------+
-    |      1      |   0    |         0.58         |
-    +-------------+--------+----------------------+
-    |      1      |   1    |         0.88         |
-    +-------------+--------+----------------------+
-    |      1      |   2    |         0.92         |
-    +-------------+--------+----------------------+
-    |      1      |   3    |         0.9          |
-    +-------------+--------+----------------------+
-
 Annotated Historic Results
 --------------------------
 
@@ -530,5 +530,5 @@
 
 .. _Juno R1 platform: https://developer.arm.com/documentation/100122/latest/
 .. _TF master as of 31/01/2017: https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/tree/?id=c38b36d
-.. _TF-A v2.11-rc0: https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/tree/?h=v2.11-rc0
-.. _TFTF v2.11-rc0: https://git.trustedfirmware.org/TF-A/tf-a-tests.git/tree/?h=v2.11-rc0
+.. _TF-A v2.12-rc0: https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/tree/?h=v2.12-rc0
+.. _TFTF v2.12-rc0: https://git.trustedfirmware.org/TF-A/tf-a-tests.git/tree/?h=v2.12-rc0
diff --git a/docs/perf/psci-performance-n1sdp.rst b/docs/perf/psci-performance-n1sdp.rst
index c1c4dd6..178d8e6 100644
--- a/docs/perf/psci-performance-n1sdp.rst
+++ b/docs/perf/psci-performance-n1sdp.rst
@@ -6,8 +6,8 @@
 
 The following source trees and binaries were used:
 
-- `TF-A v2.11-rc0`_
-- `TFTF v2.11-rc0`_
+- `TF-A v2.12-rc0`_
+- `TFTF v2.12-rc0`_
 - SCP/MCP `Prebuilt Images`_
 
 Please see the Runtime Instrumentation :ref:`Testing Methodology
@@ -92,6 +92,20 @@
 ``CPU_SUSPEND`` to deepest power level
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
+.. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in parallel (v2.12)
+
+    +---------+------+----------------+--------+----------------+
+    | Cluster | Core |   Powerdown    | Wakeup |  Cache Flush   |
+    +---------+------+----------------+--------+----------------+
+    |    0    |  0   |      2.58      | 24.14  | 0.28 (-69.57%) |
+    +---------+------+----------------+--------+----------------+
+    |    0    |  0   | 4.24 (-32.27%) |  40.1  |      0.3       |
+    +---------+------+----------------+--------+----------------+
+    |    1    |  0   |      3.58      | 35.54  |      0.28      |
+    +---------+------+----------------+--------+----------------+
+    |    1    |  0   |      3.28      | 42.36  |      0.3       |
+    +---------+------+----------------+--------+----------------+
+
 .. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in parallel (v2.11)
 
     +---------+------+----------------+--------+----------------+
@@ -106,20 +120,19 @@
     |    1    |  0   | 3.7 (+40.15%)  |  38.1  |      0.28      |
     +---------+------+----------------+--------+----------------+
 
-.. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in
-        parallel (v2.10)
+.. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in serial (v2.12)
 
-    +---------+------+----------------+------------------+-----------------+
-    | Cluster | Core |   Powerdown    |      Wakeup      |   Cache Flush   |
-    +---------+------+----------------+------------------+-----------------+
-    |    0    |  0   |      2.12      | 23.94 (+137.50%) |  0.42 (-47.50%) |
-    +---------+------+----------------+------------------+-----------------+
-    |    0    |  0   |      3.52      | 42.08 (+164.32%) |  0.26 (+62.50%) |
-    +---------+------+----------------+------------------+-----------------+
-    |    1    |  0   | 2.76 (-25.00%) | 38.3 (+195.52%)  |  0.26 (+62.50%) |
-    +---------+------+----------------+------------------+-----------------+
-    |    1    |  0   |      2.64      | 44.56 (+139.83%) | 0.36 (+100.00%) |
-    +---------+------+----------------+------------------+-----------------+
+    +---------+------+-----------+--------+-------------+
+    | Cluster | Core | Powerdown | Wakeup | Cache Flush |
+    +---------+------+-----------+--------+-------------+
+    |    0    |  0   |    1.9    |  23.8  |     0.36    |
+    +---------+------+-----------+--------+-------------+
+    |    0    |  0   |    2.26   | 23.86  |     0.34    |
+    +---------+------+-----------+--------+-------------+
+    |    1    |  0   |    2.02   |  23.4  |     0.36    |
+    +---------+------+-----------+--------+-------------+
+    |    1    |  0   |    2.24   | 23.84  |     0.36    |
+    +---------+------+-----------+--------+-------------+
 
 .. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in serial (v2.11)
 
@@ -135,24 +148,23 @@
     |    1    |  0   |    2.24   | 22.66  |     0.3     |
     +---------+------+-----------+--------+-------------+
 
-.. table:: ``CPU_SUSPEND`` latencies (µs) to deepest power level in
-        serial (v2.10)
-
-    +---------+------+-----------+------------------+----------------+
-    | Cluster | Core | Powerdown |      Wakeup      |  Cache Flush   |
-    +---------+------+-----------+------------------+----------------+
-    |    0    |  0   |    1.74   | 23.7 (+138.91%)  |      0.3       |
-    +---------+------+-----------+------------------+----------------+
-    |    0    |  0   |    2.08   | 23.96 (+128.63%) | 0.26 (-27.78%) |
-    +---------+------+-----------+------------------+----------------+
-    |    1    |  0   |    1.9    | 23.62 (+143.00%) | 0.28 (+75.00%) |
-    +---------+------+-----------+------------------+----------------+
-    |    1    |  0   |    2.06   | 23.92 (+129.12%) | 0.26 (+62.50%) |
-    +---------+------+-----------+------------------+----------------+
-
 ``CPU_SUSPEND`` to power level 0
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
+.. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in parallel (v2.12)
+
+    +---------+------+-----------+--------+----------------+
+    | Cluster | Core | Powerdown | Wakeup |  Cache Flush   |
+    +---------+------+-----------+--------+----------------+
+    |    0    |  0   |    1.46   |  31.7  |      0.32      |
+    +---------+------+-----------+--------+----------------+
+    |    0    |  0   |    2.06   |  35.5  | 0.48 (+60.00%) |
+    +---------+------+-----------+--------+----------------+
+    |    1    |  0   |    1.96   |  35.7  |      0.32      |
+    +---------+------+-----------+--------+----------------+
+    |    1    |  0   |    2.08   | 23.38  |      0.28      |
+    +---------+------+-----------+--------+----------------+
+
 .. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in parallel (v2.11)
 
     +---------+------+----------------+--------+-------------+
@@ -167,20 +179,19 @@
     |    1    |  0   |      2.14      | 21.92  |     0.28    |
     +---------+------+----------------+--------+-------------+
 
-.. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in
-        parallel (v2.10)
+.. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in serial (v2.12)
 
-    +---------+------+---------------+------------------+----------------+
-    | Cluster | Core |   Powerdown   |      Wakeup      |  Cache Flush   |
-    +---------+------+---------------+------------------+----------------+
-    |    0    |  0   | 1.5 (+70.45%) | 35.02 (+184.25%) |      0.24      |
-    +---------+------+---------------+------------------+----------------+
-    |    0    |  0   |      1.92     | 38.12 (+160.74%) |      0.28      |
-    +---------+------+---------------+------------------+----------------+
-    |    1    |  0   |      1.88     | 38.1 (+169.45%)  | 0.26 (+62.50%) |
-    +---------+------+---------------+------------------+----------------+
-    |    1    |  0   |      2.04     | 23.1 (+144.70%)  |      0.24      |
-    +---------+------+---------------+------------------+----------------+
+    +---------+------+-----------+--------+----------------+
+    | Cluster | Core | Powerdown | Wakeup |  Cache Flush   |
+    +---------+------+-----------+--------+----------------+
+    |    0    |  0   |    1.66   | 23.22  |      0.36      |
+    +---------+------+-----------+--------+----------------+
+    |    0    |  0   |    2.58   | 23.72  | 0.78 (+85.71%) |
+    +---------+------+-----------+--------+----------------+
+    |    1    |  0   |    2.02   | 23.84  |      0.38      |
+    +---------+------+-----------+--------+----------------+
+    |    1    |  0   |    2.16   | 23.92  |      0.34      |
+    +---------+------+-----------+--------+----------------+
 
 .. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in serial (v2.11)
 
@@ -196,26 +207,26 @@
     |    1    |  0   |    2.18   |  22.3  |     0.34    |
     +---------+------+-----------+--------+-------------+
 
-.. table:: ``CPU_SUSPEND`` latencies (µs) to power level 0 in serial (v2.10)
-
-    +---------+------+-----------+------------------+-----------------+
-    | Cluster | Core | Powerdown |      Wakeup      |   Cache Flush   |
-    +---------+------+-----------+------------------+-----------------+
-    |    0    |  0   |    1.52   | 23.08 (+145.53%) |       0.3       |
-    +---------+------+-----------+------------------+-----------------+
-    |    0    |  0   |    1.98   | 23.68 (+141.63%) |  0.28 (+55.56%) |
-    +---------+------+-----------+------------------+-----------------+
-    |    1    |  0   |    1.84   | 23.86 (+148.54%) | 0.28 (+100.00%) |
-    +---------+------+-----------+------------------+-----------------+
-    |    1    |  0   |    1.98   | 23.68 (+142.13%) |  0.28 (+55.56%) |
-    +---------+------+-----------+------------------+-----------------+
-
 ``CPU_OFF`` on all non-lead CPUs
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
 ``CPU_OFF`` on all non-lead CPUs in sequence then, ``CPU_SUSPEND`` on the lead
 core to the deepest power level.
 
+.. table:: ``CPU_OFF`` latencies (µs) on all non-lead CPUs (v2.12)
+
+    +---------+------+-----------+--------+----------------+
+    | Cluster | Core | Powerdown | Wakeup |  Cache Flush   |
+    +---------+------+-----------+--------+----------------+
+    |    0    |  0   |    1.84   | 23.82  |      0.36      |
+    +---------+------+-----------+--------+----------------+
+    |    0    |  0   |   14.18   | 31.78  | 0.56 (+86.67%) |
+    +---------+------+-----------+--------+----------------+
+    |    1    |  0   |   13.64   | 30.54  |      0.36      |
+    +---------+------+-----------+--------+----------------+
+    |    1    |  0   |   14.18   | 31.82  |      0.68      |
+    +---------+------+-----------+--------+----------------+
+
 .. table:: ``CPU_OFF`` latencies (µs) on all non-lead CPUs (v2.11)
 
     +---------+------+-----------+--------+----------------+
@@ -230,23 +241,23 @@
     |    1    |  0   |   13.84   | 30.06  | 0.28 (-60.00%) |
     +---------+------+-----------+--------+----------------+
 
-.. table:: ``CPU_OFF`` latencies (µs) on all non-lead CPUs (v2.10)
-
-    +---------+------+-----------+------------------+----------------+
-    | Cluster | Core | Powerdown |      Wakeup      |  Cache Flush   |
-    +---------+------+-----------+------------------+----------------+
-    |    0    |  0   |    1.78   | 23.7 (+138.43%)  |      0.3       |
-    +---------+------+-----------+------------------+----------------+
-    |    0    |  0   |   13.96   | 31.16 (+137.86%) | 0.34 (-32.00%) |
-    +---------+------+-----------+------------------+----------------+
-    |    1    |  0   |   13.54   | 30.24 (+144.66%) | 0.26 (-38.10%) |
-    +---------+------+-----------+------------------+----------------+
-    |    1    |  0   |   14.46   | 31.12 (+134.69%) | 0.7 (+34.62%)  |
-    +---------+------+-----------+------------------+----------------+
-
 ``CPU_VERSION`` in parallel
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
+.. table:: ``CPU_VERSION`` latency (µs) in parallel on all cores (v2.12)
+
+    +----------+------+-------------------+
+    | Cluster  | Core |      Latency      |
+    +----------+------+-------------------+
+    |    0     |  0   |        0.14       |
+    +----------+------+-------------------+
+    |    0     |  0   |   0.2 (-28.57%)   |
+    +----------+------+-------------------+
+    |    1     |  0   |        0.2        |
+    +----------+------+-------------------+
+    |    1     |  0   |        0.26       |
+    +----------+------+-------------------+
+
 .. table:: ``CPU_VERSION`` latency (µs) in parallel on all cores (v2.11)
 
     +-------------+--------+--------------+
@@ -261,28 +272,12 @@
     |      1      |   0    |     0.26     |
     +-------------+--------+--------------+
 
-.. table:: ``CPU_VERSION`` latency (µs) in parallel on all cores (v2.10)
-
-    +----------------------------------------------+
-    | test_rt_instr_psci_version_parallel (latest) |
-    +-------------+--------+-----------------------+
-    |   Cluster   |  Core  |        Latency        |
-    +-------------+--------+-----------------------+
-    |      0      |   0    |     0.14 (+75.00%)    |
-    +-------------+--------+-----------------------+
-    |      0      |   0    |          0.22         |
-    +-------------+--------+-----------------------+
-    |      1      |   0    |          0.2          |
-    +-------------+--------+-----------------------+
-    |      1      |   0    |          0.26         |
-    +-------------+--------+-----------------------+
-
 --------------
 
 *Copyright (c) 2023-2024, Arm Limited. All rights reserved.*
 
-.. _TF-A v2.11-rc0: https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/refs/tags/v2.11-rc0
-.. _TFTF v2.11-rc0: https://review.trustedfirmware.org/plugins/gitiles/TF-A/tf-a-tests/+/refs/tags/v2.11-rc0
+.. _TF-A v2.12-rc0: https://review.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/refs/tags/v2.12-rc0
+.. _TFTF v2.12-rc0: https://review.trustedfirmware.org/plugins/gitiles/TF-A/tf-a-tests/+/refs/tags/v2.12-rc0
 .. _user guide: https://gitlab.arm.com/arm-reference-solutions/arm-reference-solutions-docs/-/blob/master/docs/n1sdp/user-guide.rst
-.. _Prebuilt Images:  https://downloads.trustedfirmware.org/tf-a/css_scp_2.11.0/n1sdp/release/
+.. _Prebuilt Images:  https://downloads.trustedfirmware.org/tf-a/css_scp_2.12.0/n1sdp/release/
 .. _N1SDP: https://developer.arm.com/documentation/101489/latest
diff --git a/docs/plat/arm/fvp/fvp-support.rst b/docs/plat/arm/fvp/fvp-support.rst
index 5292d68..ad76cf1 100644
--- a/docs/plat/arm/fvp/fvp-support.rst
+++ b/docs/plat/arm/fvp/fvp-support.rst
@@ -11,8 +11,8 @@
 .. note::
    The FVP models used are Version 11.26 Build 11, unless otherwise stated.
 
--  ``FVP_Base_AEMvA``
 -  ``FVP_Base_AEMvA-AEMvA``
+-  ``FVP_Base_RevC-2xAEMvA``
 -  ``FVP_Base_Cortex-A32x4``
 -  ``FVP_Base_Cortex-A35x4``
 -  ``FVP_Base_Cortex-A53x4``
@@ -40,11 +40,12 @@
 -  ``FVP_Base_Neoverse-N1``
 -  ``FVP_Base_Neoverse-N2``
 -  ``FVP_Base_Neoverse-V1``
--  ``FVP_Base_RevC-2xAEMv8A``
 -  ``FVP_BaseR_AEMv8R``
 -  ``FVP_Morello`` (Version 0.11/33)
 -  ``FVP_RD_V1``
--  ``FVP_TC2`` (Version 11.23/17)
+-  ``FVP_RD_1_AE`` (Version 11.27/20)
+-  ``FVP_TC3`` (Version 11.26/16)
+-  ``FVP_TC4`` (Version 0.0/8404)
 
 The latest version of the AArch32 build of TF-A has been tested on the
 following Arm FVPs without shifted affinities, and that do not support threaded
diff --git a/docs/plat/arm/tc/index.rst b/docs/plat/arm/tc/index.rst
index 9469e9a..467738c 100644
--- a/docs/plat/arm/tc/index.rst
+++ b/docs/plat/arm/tc/index.rst
@@ -13,13 +13,15 @@
 - SCMI
 - MHUv2
 
-Currently, the main difference between TC0 (TARGET_PLATFORM=0), TC1
-(TARGET_PLATFORM=1), TC2 (TARGET_PLATFORM=2) platforms w.r.t to TF-A
-is the CPUs supported as below:
+The TF-A build is specified by the option `TARGET_PLATFORM` which represents
+the Total Compute platform number. The platforms support the CPU variants
+listed as below:
 
 -  TC0 has support for Cortex A510, Cortex A710 and Cortex X2. (Note TC0 is now deprecated)
 -  TC1 has support for Cortex A510, Cortex A715 and Cortex X3. (Note TC1 is now deprecated)
--  TC2 has support for Cortex A520, Cortex A720 and Cortex x4.
+-  TC2 has support for Cortex A520, Cortex A720 and Cortex x4. (Note TC2 is now deprecated)
+-  TC3 has support for Cortex A520, Cortex A725 and Cortex x925.
+
 
 Boot Sequence
 -------------
@@ -43,7 +45,7 @@
    .. code:: shell
 
       make PLAT=tc BL33=<path_to_uboot.bin> \
-      SCP_BL2=<path_to_scp_ramfw.bin> TARGET_PLATFORM={0,1,2} all fip
+      SCP_BL2=<path_to_scp_ramfw.bin> TARGET_PLATFORM={3} all fip
 
    Enable TBBR by adding the following options to the make command:
 
diff --git a/fdts/stm32mp15xx-dhcom-som.dtsi b/fdts/stm32mp15xx-dhcom-som.dtsi
index 12846db..46ef0f0 100644
--- a/fdts/stm32mp15xx-dhcom-som.dtsi
+++ b/fdts/stm32mp15xx-dhcom-som.dtsi
@@ -195,7 +195,7 @@
 		CLK_MCU_PLL3P
 		CLK_RTC_LSE
 		CLK_MCO1_DISABLED
-		CLK_MCO2_PLL4P
+		CLK_MCO2_PLL4
 		CLK_CKPER_HSE
 		CLK_FMC_ACLK
 		CLK_QSPI_ACLK
diff --git a/plat/qemu/common/qemu_common.c b/plat/qemu/common/qemu_common.c
index 068c69c..9ccb2c8 100644
--- a/plat/qemu/common/qemu_common.c
+++ b/plat/qemu/common/qemu_common.c
@@ -178,7 +178,7 @@
  */
 #define PLAT_SPMC_SHMEM_DATASTORE_SIZE 64 * 1024
 
-uint8_t plat_spmc_shmem_datastore[PLAT_SPMC_SHMEM_DATASTORE_SIZE];
+uint8_t plat_spmc_shmem_datastore[PLAT_SPMC_SHMEM_DATASTORE_SIZE] __aligned(2 * sizeof(long));
 
 int plat_spmc_shmem_datastore_get(uint8_t **datastore, size_t *size)
 {
@@ -198,16 +198,17 @@
 }
 #endif
 
-#if defined(SPD_spmd) && (SPMC_AT_EL3 == 0)
-/*
- * A dummy implementation of the platform handler for Group0 secure interrupt.
- */
+#if defined(SPD_spmd)
 int plat_spmd_handle_group0_interrupt(uint32_t intid)
 {
+	/*
+	 * Currently, there are no sources of Group0 secure interrupt
+	 * enabled for QEMU.
+	 */
 	(void)intid;
 	return -1;
 }
-#endif /*defined(SPD_spmd) && (SPMC_AT_EL3 == 0)*/
+#endif /*defined(SPD_spmd)*/
 
 #if ENABLE_RME
 /*
diff --git a/plat/qemu/qemu/include/platform_def.h b/plat/qemu/qemu/include/platform_def.h
index f78be90..0c85b1e 100644
--- a/plat/qemu/qemu/include/platform_def.h
+++ b/plat/qemu/qemu/include/platform_def.h
@@ -150,7 +150,7 @@
  * Put BL3-1 at the top of the Trusted SRAM. BL31_BASE is calculated using the
  * current BL3-1 debug size plus a little space for growth.
  */
-#define BL31_BASE			(BL31_LIMIT - 0x60000)
+#define BL31_BASE			(BL31_LIMIT - 0x70000)
 #define BL31_LIMIT			(BL_RAM_BASE + BL_RAM_SIZE - FW_HANDOFF_SIZE)
 #define BL31_PROGBITS_LIMIT		BL1_RW_BASE