Use *_END instead of *_LIMIT for linker derived end addresses
The usage of _LIMIT seems odd here, so rename as follows:
BL_CODE_LIMIT --> BL_CODE_END
BL_RO_DATA_LIMIT --> BL_RO_DATA_END
BL1_CODE_LIMIT --> BL1_CODE_END
BL1_RO_DATA_LIMIT --> BL1_RO_DATA_END
Basically, we want to use _LIMIT and _END properly as follows:
*_SIZE + *_MAX_SIZE = *_LIMIT
*_SIZE + *_SIZE = *_END
The _LIMIT is generally defined by platform_def.h to indicate the
platform-dependent memory constraint. So, its typical usage is
ASSERT(. <= BL31_LIMIT, "BL31 image has exceeded its limit.")
in a linker script.
On the other hand, _END is used to indicate the end address of the
compiled image, i.e. we do not know it until the image is linked.
Here, all of these macros belong to the latter, so should be
suffixed with _END.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
diff --git a/plat/arm/common/arm_bl1_setup.c b/plat/arm/common/arm_bl1_setup.c
index 50d102a..91809fb 100644
--- a/plat/arm/common/arm_bl1_setup.c
+++ b/plat/arm/common/arm_bl1_setup.c
@@ -124,9 +124,9 @@
arm_setup_page_tables(bl1_tzram_layout.total_base,
bl1_tzram_layout.total_size,
BL_CODE_BASE,
- BL1_CODE_LIMIT,
+ BL1_CODE_END,
BL1_RO_DATA_BASE,
- BL1_RO_DATA_LIMIT
+ BL1_RO_DATA_END
#if USE_COHERENT_MEM
, BL1_COHERENT_RAM_BASE,
BL1_COHERENT_RAM_LIMIT
diff --git a/plat/arm/common/arm_bl2_setup.c b/plat/arm/common/arm_bl2_setup.c
index a4fac0d..293e5e5 100644
--- a/plat/arm/common/arm_bl2_setup.c
+++ b/plat/arm/common/arm_bl2_setup.c
@@ -238,9 +238,9 @@
arm_setup_page_tables(bl2_tzram_layout.total_base,
bl2_tzram_layout.total_size,
BL_CODE_BASE,
- BL_CODE_LIMIT,
+ BL_CODE_END,
BL_RO_DATA_BASE,
- BL_RO_DATA_LIMIT
+ BL_RO_DATA_END
#if USE_COHERENT_MEM
, BL2_COHERENT_RAM_BASE,
BL2_COHERENT_RAM_LIMIT
diff --git a/plat/arm/common/arm_bl2u_setup.c b/plat/arm/common/arm_bl2u_setup.c
index de7d0c2..cad42f0 100644
--- a/plat/arm/common/arm_bl2u_setup.c
+++ b/plat/arm/common/arm_bl2u_setup.c
@@ -95,9 +95,9 @@
arm_setup_page_tables(BL2U_BASE,
BL31_LIMIT,
BL_CODE_BASE,
- BL_CODE_LIMIT,
+ BL_CODE_END,
BL_RO_DATA_BASE,
- BL_RO_DATA_LIMIT
+ BL_RO_DATA_END
#if USE_COHERENT_MEM
,
BL2U_COHERENT_RAM_BASE,
diff --git a/plat/arm/common/arm_bl31_setup.c b/plat/arm/common/arm_bl31_setup.c
index bc1ec11..6b6bae8 100644
--- a/plat/arm/common/arm_bl31_setup.c
+++ b/plat/arm/common/arm_bl31_setup.c
@@ -288,9 +288,9 @@
arm_setup_page_tables(BL31_BASE,
BL31_END - BL31_BASE,
BL_CODE_BASE,
- BL_CODE_LIMIT,
+ BL_CODE_END,
BL_RO_DATA_BASE,
- BL_RO_DATA_LIMIT
+ BL_RO_DATA_END
#if USE_COHERENT_MEM
, BL31_COHERENT_RAM_BASE,
BL31_COHERENT_RAM_LIMIT
diff --git a/plat/arm/common/sp_min/arm_sp_min_setup.c b/plat/arm/common/sp_min/arm_sp_min_setup.c
index d48556e..40155f4 100644
--- a/plat/arm/common/sp_min/arm_sp_min_setup.c
+++ b/plat/arm/common/sp_min/arm_sp_min_setup.c
@@ -202,9 +202,9 @@
arm_setup_page_tables(BL32_BASE,
(BL32_END - BL32_BASE),
BL_CODE_BASE,
- BL_CODE_LIMIT,
+ BL_CODE_END,
BL_RO_DATA_BASE,
- BL_RO_DATA_LIMIT
+ BL_RO_DATA_END
#if USE_COHERENT_MEM
, BL32_COHERENT_RAM_BASE,
BL32_COHERENT_RAM_LIMIT
diff --git a/plat/arm/common/tsp/arm_tsp_setup.c b/plat/arm/common/tsp/arm_tsp_setup.c
index 09029f4..58c2b7b 100644
--- a/plat/arm/common/tsp/arm_tsp_setup.c
+++ b/plat/arm/common/tsp/arm_tsp_setup.c
@@ -91,9 +91,9 @@
arm_setup_page_tables(BL32_BASE,
(BL32_END - BL32_BASE),
BL_CODE_BASE,
- BL_CODE_LIMIT,
+ BL_CODE_END,
BL_RO_DATA_BASE,
- BL_RO_DATA_LIMIT
+ BL_RO_DATA_END
#if USE_COHERENT_MEM
, BL32_COHERENT_RAM_BASE,
BL32_COHERENT_RAM_LIMIT
diff --git a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
index c05b094..f6c4b98 100644
--- a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
+++ b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
@@ -160,9 +160,9 @@
arm_setup_page_tables(BL31_BASE,
BL31_END - BL31_BASE,
BL_CODE_BASE,
- BL_CODE_LIMIT,
+ BL_CODE_END,
BL_RO_DATA_BASE,
- BL_RO_DATA_LIMIT,
+ BL_RO_DATA_END,
BL31_COHERENT_RAM_BASE,
BL31_COHERENT_RAM_LIMIT);
enable_mmu_el3(0);
diff --git a/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c b/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c
index 8e3ca62..cf9ec6a 100644
--- a/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c
+++ b/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c
@@ -81,9 +81,9 @@
arm_setup_page_tables(BL32_BASE,
BL32_END - BL32_BASE,
BL_CODE_BASE,
- BL_CODE_LIMIT,
+ BL_CODE_END,
BL_RO_DATA_BASE,
- BL_RO_DATA_LIMIT,
+ BL_RO_DATA_END,
BL32_COHERENT_RAM_BASE,
BL32_COHERENT_RAM_LIMIT
);