xlat: Fix MISRA defects
Fix defects of MISRA C-2012 rules 8.13, 10.1, 10.3, 10.4, 10.8, 11.6,
14.4, 15.7, 17.8, 20.10, 20.12, 21.1 and Directive 4.9.
Change-Id: I7ff61e71733908596dbafe2e99d99b4fce9765bd
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
diff --git a/lib/xlat_tables/aarch32/xlat_tables.c b/lib/xlat_tables/aarch32/xlat_tables.c
index dd63939..87b15b8 100644
--- a/lib/xlat_tables/aarch32/xlat_tables.c
+++ b/lib/xlat_tables/aarch32/xlat_tables.c
@@ -13,7 +13,7 @@
#include <xlat_tables.h>
#include "../xlat_tables_private.h"
-#if ARM_ARCH_MAJOR == 7 && !defined(ARMV7_SUPPORTS_LARGE_PAGE_ADDRESSING)
+#if (ARM_ARCH_MAJOR == 7) && !defined(ARMV7_SUPPORTS_LARGE_PAGE_ADDRESSING)
#error ARMv7 target does not support LPAE MMU descriptors
#endif
@@ -34,16 +34,16 @@
}
#endif /* ENABLE_ASSERTIONS */
-int xlat_arch_current_el(void)
+unsigned int xlat_arch_current_el(void)
{
/*
* If EL3 is in AArch32 mode, all secure PL1 modes (Monitor, System,
* SVC, Abort, UND, IRQ and FIQ modes) execute at EL3.
*/
- return 3;
+ return 3U;
}
-uint64_t xlat_arch_get_xn_desc(int el __unused)
+uint64_t xlat_arch_get_xn_desc(unsigned int el __unused)
{
return UPPER_ATTRS(XN);
}
@@ -53,12 +53,12 @@
unsigned long long max_pa;
uintptr_t max_va;
print_mmap();
- init_xlation_table(0, base_xlation_table, XLAT_TABLE_LEVEL_BASE,
+ init_xlation_table(0U, base_xlation_table, XLAT_TABLE_LEVEL_BASE,
&max_va, &max_pa);
- assert(max_va <= PLAT_VIRT_ADDR_SPACE_SIZE - 1);
- assert(max_pa <= PLAT_PHY_ADDR_SPACE_SIZE - 1);
- assert((PLAT_PHY_ADDR_SPACE_SIZE - 1) <= get_max_supported_pa());
+ assert(max_va <= (PLAT_VIRT_ADDR_SPACE_SIZE - 1U));
+ assert(max_pa <= (PLAT_PHY_ADDR_SPACE_SIZE - 1U));
+ assert((PLAT_PHY_ADDR_SPACE_SIZE - 1U) <= get_max_supported_pa());
}
/*******************************************************************************
@@ -71,7 +71,7 @@
uint64_t ttbr0;
assert(IS_IN_SECURE());
- assert((read_sctlr() & SCTLR_M_BIT) == 0);
+ assert((read_sctlr() & SCTLR_M_BIT) == 0U);
/* Set attributes in the right indices of the MAIR */
mair0 = MAIR0_ATTR_SET(ATTR_DEVICE, ATTR_DEVICE_INDEX);
@@ -87,18 +87,18 @@
/*
* Set TTBCR bits as well. Set TTBR0 table properties. Disable TTBR1.
*/
- if (flags & XLAT_TABLE_NC) {
+ int t0sz = 32 - __builtin_ctzll(PLAT_VIRT_ADDR_SPACE_SIZE);
+
+ if ((flags & XLAT_TABLE_NC) != 0U) {
/* Inner & outer non-cacheable non-shareable. */
ttbcr = TTBCR_EAE_BIT |
TTBCR_SH0_NON_SHAREABLE | TTBCR_RGN0_OUTER_NC |
- TTBCR_RGN0_INNER_NC |
- (32 - __builtin_ctzll(PLAT_VIRT_ADDR_SPACE_SIZE));
+ TTBCR_RGN0_INNER_NC | (uint32_t) t0sz;
} else {
/* Inner & outer WBWA & shareable. */
ttbcr = TTBCR_EAE_BIT |
TTBCR_SH0_INNER_SHAREABLE | TTBCR_RGN0_OUTER_WBA |
- TTBCR_RGN0_INNER_WBA |
- (32 - __builtin_ctzll(PLAT_VIRT_ADDR_SPACE_SIZE));
+ TTBCR_RGN0_INNER_WBA | (uint32_t) t0sz;
}
ttbcr |= TTBCR_EPD1_BIT;
write_ttbcr(ttbcr);
@@ -106,7 +106,7 @@
/* Set TTBR0 bits as well */
ttbr0 = (uintptr_t) base_xlation_table;
write64_ttbr0(ttbr0);
- write64_ttbr1(0);
+ write64_ttbr1(0U);
/*
* Ensure all translation table writes have drained
@@ -120,7 +120,7 @@
sctlr = read_sctlr();
sctlr |= SCTLR_WXN_BIT | SCTLR_M_BIT;
- if (flags & DISABLE_DCACHE)
+ if ((flags & DISABLE_DCACHE) != 0U)
sctlr &= ~SCTLR_C_BIT;
else
sctlr |= SCTLR_C_BIT;
diff --git a/lib/xlat_tables/aarch64/xlat_tables.c b/lib/xlat_tables/aarch64/xlat_tables.c
index 5717516..d88d7b1 100644
--- a/lib/xlat_tables/aarch64/xlat_tables.c
+++ b/lib/xlat_tables/aarch64/xlat_tables.c
@@ -31,26 +31,26 @@
unsigned long long max_addr)
{
/* Physical address can't exceed 48 bits */
- assert((max_addr & ADDR_MASK_48_TO_63) == 0);
+ assert((max_addr & ADDR_MASK_48_TO_63) == 0U);
/* 48 bits address */
- if (max_addr & ADDR_MASK_44_TO_47)
+ if ((max_addr & ADDR_MASK_44_TO_47) != 0U)
return TCR_PS_BITS_256TB;
/* 44 bits address */
- if (max_addr & ADDR_MASK_42_TO_43)
+ if ((max_addr & ADDR_MASK_42_TO_43) != 0U)
return TCR_PS_BITS_16TB;
/* 42 bits address */
- if (max_addr & ADDR_MASK_40_TO_41)
+ if ((max_addr & ADDR_MASK_40_TO_41) != 0U)
return TCR_PS_BITS_4TB;
/* 40 bits address */
- if (max_addr & ADDR_MASK_36_TO_39)
+ if ((max_addr & ADDR_MASK_36_TO_39) != 0U)
return TCR_PS_BITS_1TB;
/* 36 bits address */
- if (max_addr & ADDR_MASK_32_TO_35)
+ if ((max_addr & ADDR_MASK_32_TO_35) != 0U)
return TCR_PS_BITS_64GB;
return TCR_PS_BITS_4GB;
@@ -78,21 +78,21 @@
}
#endif /* ENABLE_ASSERTIONS */
-int xlat_arch_current_el(void)
+unsigned int xlat_arch_current_el(void)
{
- int el = GET_EL(read_CurrentEl());
+ unsigned int el = (unsigned int)GET_EL(read_CurrentEl());
- assert(el > 0);
+ assert(el > 0U);
return el;
}
-uint64_t xlat_arch_get_xn_desc(int el)
+uint64_t xlat_arch_get_xn_desc(unsigned int el)
{
- if (el == 3) {
+ if (el == 3U) {
return UPPER_ATTRS(XN);
} else {
- assert(el == 1);
+ assert(el == 1U);
return UPPER_ATTRS(PXN);
}
}
@@ -102,12 +102,12 @@
unsigned long long max_pa;
uintptr_t max_va;
print_mmap();
- init_xlation_table(0, base_xlation_table, XLAT_TABLE_LEVEL_BASE,
+ init_xlation_table(0U, base_xlation_table, XLAT_TABLE_LEVEL_BASE,
&max_va, &max_pa);
- assert(max_va <= PLAT_VIRT_ADDR_SPACE_SIZE - 1);
- assert(max_pa <= PLAT_PHY_ADDR_SPACE_SIZE - 1);
- assert((PLAT_PHY_ADDR_SPACE_SIZE - 1) <= get_max_supported_pa());
+ assert(max_va <= (PLAT_VIRT_ADDR_SPACE_SIZE - 1U));
+ assert(max_pa <= (PLAT_PHY_ADDR_SPACE_SIZE - 1U));
+ assert((PLAT_PHY_ADDR_SPACE_SIZE - 1U) <= get_max_supported_pa());
tcr_ps_bits = calc_physical_addr_size_bits(max_pa);
}
@@ -129,7 +129,7 @@
uint32_t sctlr; \
\
assert(IS_IN_EL(_el)); \
- assert((read_sctlr_el##_el() & SCTLR_M_BIT) == 0); \
+ assert((read_sctlr_el##_el() & SCTLR_M_BIT) == 0U); \
\
/* Set attributes in the right indices of the MAIR */ \
mair = MAIR_ATTR_SET(ATTR_DEVICE, ATTR_DEVICE_INDEX); \
@@ -144,16 +144,18 @@
\
/* Set TCR bits as well. */ \
/* Set T0SZ to (64 - width of virtual address space) */ \
- if (flags & XLAT_TABLE_NC) { \
+ int t0sz = 64 - __builtin_ctzll(PLAT_VIRT_ADDR_SPACE_SIZE);\
+ \
+ if ((flags & XLAT_TABLE_NC) != 0U) { \
/* Inner & outer non-cacheable non-shareable. */\
tcr = TCR_SH_NON_SHAREABLE | \
TCR_RGN_OUTER_NC | TCR_RGN_INNER_NC | \
- (64 - __builtin_ctzll(PLAT_VIRT_ADDR_SPACE_SIZE));\
+ (uint64_t) t0sz; \
} else { \
/* Inner & outer WBWA & shareable. */ \
tcr = TCR_SH_INNER_SHAREABLE | \
TCR_RGN_OUTER_WBA | TCR_RGN_INNER_WBA | \
- (64 - __builtin_ctzll(PLAT_VIRT_ADDR_SPACE_SIZE));\
+ (uint64_t) t0sz; \
} \
tcr |= _tcr_extra; \
write_tcr_el##_el(tcr); \
@@ -172,7 +174,7 @@
sctlr = read_sctlr_el##_el(); \
sctlr |= SCTLR_WXN_BIT | SCTLR_M_BIT; \
\
- if (flags & DISABLE_DCACHE) \
+ if ((flags & DISABLE_DCACHE) != 0U) \
sctlr &= ~SCTLR_C_BIT; \
else \
sctlr |= SCTLR_C_BIT; \
diff --git a/lib/xlat_tables/xlat_tables_common.c b/lib/xlat_tables/xlat_tables_common.c
index ce6e341..a2850cb 100644
--- a/lib/xlat_tables/xlat_tables_common.c
+++ b/lib/xlat_tables/xlat_tables_common.c
@@ -32,6 +32,7 @@
#endif
#define UNSET_DESC ~0ULL
+#define MT_UNKNOWN ~0U
static uint64_t xlat_tables[MAX_XLAT_TABLES][XLAT_TABLE_ENTRIES]
__aligned(XLAT_TABLE_SIZE) __section("xlat_table");
@@ -55,7 +56,7 @@
#if LOG_LEVEL >= LOG_LEVEL_VERBOSE
debug_print("mmap:\n");
mmap_region_t *mm = mmap;
- while (mm->size) {
+ while (mm->size != 0U) {
debug_print(" VA:%p PA:0x%llx size:0x%zx attr:0x%x\n",
(void *)mm->base_va, mm->base_pa,
mm->size, mm->attr);
@@ -69,46 +70,47 @@
size_t size, unsigned int attr)
{
mmap_region_t *mm = mmap;
- mmap_region_t *mm_last = mm + ARRAY_SIZE(mmap) - 1;
- unsigned long long end_pa = base_pa + size - 1;
- uintptr_t end_va = base_va + size - 1;
+ const mmap_region_t *mm_last = mm + ARRAY_SIZE(mmap) - 1U;
+ unsigned long long end_pa = base_pa + size - 1U;
+ uintptr_t end_va = base_va + size - 1U;
assert(IS_PAGE_ALIGNED(base_pa));
assert(IS_PAGE_ALIGNED(base_va));
assert(IS_PAGE_ALIGNED(size));
- if (!size)
+ if (size == 0U)
return;
assert(base_pa < end_pa); /* Check for overflows */
assert(base_va < end_va);
assert((base_va + (uintptr_t)size - (uintptr_t)1) <=
- (PLAT_VIRT_ADDR_SPACE_SIZE - 1));
+ (PLAT_VIRT_ADDR_SPACE_SIZE - 1U));
assert((base_pa + (unsigned long long)size - 1ULL) <=
- (PLAT_PHY_ADDR_SPACE_SIZE - 1));
+ (PLAT_PHY_ADDR_SPACE_SIZE - 1U));
#if ENABLE_ASSERTIONS
/* Check for PAs and VAs overlaps with all other regions */
for (mm = mmap; mm->size; ++mm) {
- uintptr_t mm_end_va = mm->base_va + mm->size - 1;
+ uintptr_t mm_end_va = mm->base_va + mm->size - 1U;
/*
* Check if one of the regions is completely inside the other
* one.
*/
int fully_overlapped_va =
- ((base_va >= mm->base_va) && (end_va <= mm_end_va)) ||
- ((mm->base_va >= base_va) && (mm_end_va <= end_va));
+ (((base_va >= mm->base_va) && (end_va <= mm_end_va)) ||
+ ((mm->base_va >= base_va) && (mm_end_va <= end_va)))
+ ? 1 : 0;
/*
* Full VA overlaps are only allowed if both regions are
* identity mapped (zero offset) or have the same VA to PA
* offset. Also, make sure that it's not the exact same area.
*/
- if (fully_overlapped_va) {
+ if (fully_overlapped_va == 1) {
assert((mm->base_va - mm->base_pa) ==
(base_va - base_pa));
assert((base_va != mm->base_va) || (size != mm->size));
@@ -122,12 +124,12 @@
unsigned long long mm_end_pa =
mm->base_pa + mm->size - 1;
- int separated_pa =
- (end_pa < mm->base_pa) || (base_pa > mm_end_pa);
- int separated_va =
- (end_va < mm->base_va) || (base_va > mm_end_va);
+ int separated_pa = ((end_pa < mm->base_pa) ||
+ (base_pa > mm_end_pa)) ? 1 : 0;
+ int separated_va = ((end_va < mm->base_va) ||
+ (base_va > mm_end_va)) ? 1 : 0;
- assert(separated_va && separated_pa);
+ assert((separated_va == 1) && (separated_pa == 1));
}
}
@@ -136,7 +138,7 @@
#endif /* ENABLE_ASSERTIONS */
/* Find correct place in mmap to insert new region */
- while (mm->base_va < base_va && mm->size)
+ while ((mm->base_va < base_va) && (mm->size != 0U))
++mm;
/*
@@ -154,10 +156,10 @@
++mm;
/* Make room for new region by moving other regions up by one place */
- memmove(mm + 1, mm, (uintptr_t)mm_last - (uintptr_t)mm);
+ (void)memmove(mm + 1, mm, (uintptr_t)mm_last - (uintptr_t)mm);
/* Check we haven't lost the empty sentinal from the end of the array */
- assert(mm_last->size == 0);
+ assert(mm_last->size == 0U);
mm->base_pa = base_pa;
mm->base_va = base_va;
@@ -172,9 +174,12 @@
void mmap_add(const mmap_region_t *mm)
{
- while (mm->size) {
- mmap_add_region(mm->base_pa, mm->base_va, mm->size, mm->attr);
- ++mm;
+ const mmap_region_t *mm_cursor = mm;
+
+ while (mm_cursor->size != 0U) {
+ mmap_add_region(mm_cursor->base_pa, mm_cursor->base_va,
+ mm_cursor->size, mm_cursor->attr);
+ mm_cursor++;
}
}
@@ -185,7 +190,7 @@
int mem_type;
/* Make sure that the granularity is fine enough to map this address. */
- assert((addr_pa & XLAT_BLOCK_MASK(level)) == 0);
+ assert((addr_pa & XLAT_BLOCK_MASK(level)) == 0U);
desc = addr_pa;
/*
@@ -193,8 +198,8 @@
* rest.
*/
desc |= (level == XLAT_TABLE_LEVEL_MAX) ? PAGE_DESC : BLOCK_DESC;
- desc |= (attr & MT_NS) ? LOWER_ATTRS(NS) : 0;
- desc |= (attr & MT_RW) ? LOWER_ATTRS(AP_RW) : LOWER_ATTRS(AP_RO);
+ desc |= ((attr & MT_NS) != 0U) ? LOWER_ATTRS(NS) : 0U;
+ desc |= ((attr & MT_RW) != 0U) ? LOWER_ATTRS(AP_RW) : LOWER_ATTRS(AP_RO);
/*
* Always set the access flag, as this library assumes access flag
* faults aren't managed.
@@ -239,7 +244,7 @@
* For read-only memory, rely on the MT_EXECUTE/MT_EXECUTE_NEVER
* attribute to figure out the value of the XN bit.
*/
- if ((attr & MT_RW) || (attr & MT_EXECUTE_NEVER)) {
+ if (((attr & MT_RW) != 0U) || ((attr & MT_EXECUTE_NEVER) != 0U)) {
desc |= execute_never_mask;
}
@@ -253,9 +258,9 @@
debug_print((mem_type == MT_MEMORY) ? "MEM" :
((mem_type == MT_NON_CACHEABLE) ? "NC" : "DEV"));
- debug_print(attr & MT_RW ? "-RW" : "-RO");
- debug_print(attr & MT_NS ? "-NS" : "-S");
- debug_print(attr & MT_EXECUTE_NEVER ? "-XN" : "-EXEC");
+ debug_print(((attr & MT_RW) != 0U) ? "-RW" : "-RO");
+ debug_print(((attr & MT_NS) != 0U) ? "-NS" : "-S");
+ debug_print(((attr & MT_EXECUTE_NEVER) != 0U) ? "-XN" : "-EXEC");
return desc;
}
@@ -265,14 +270,14 @@
*
* On success, this function returns 0.
* If there are partial overlaps (meaning that a smaller size is needed) or if
- * the region can't be found in the given area, it returns -1. In this case the
- * value pointed by attr should be ignored by the caller.
+ * the region can't be found in the given area, it returns MT_UNKNOWN. In this
+ * case the value pointed by attr should be ignored by the caller.
*/
-static int mmap_region_attr(mmap_region_t *mm, uintptr_t base_va,
- size_t size, unsigned int *attr)
+static unsigned int mmap_region_attr(const mmap_region_t *mm, uintptr_t base_va,
+ size_t size, unsigned int *attr)
{
/* Don't assume that the area is contained in the first region */
- int ret = -1;
+ unsigned int ret = MT_UNKNOWN;
/*
* Get attributes from last (innermost) region that contains the
@@ -289,26 +294,26 @@
* in region 2. The loop shouldn't stop at region 2 as inner regions
* have priority over outer regions, it should stop at region 5.
*/
- for (;; ++mm) {
+ for ( ; ; ++mm) {
- if (!mm->size)
+ if (mm->size == 0U)
return ret; /* Reached end of list */
- if (mm->base_va > base_va + size - 1)
+ if (mm->base_va > (base_va + size - 1U))
return ret; /* Next region is after area so end */
- if (mm->base_va + mm->size - 1 < base_va)
+ if ((mm->base_va + mm->size - 1U) < base_va)
continue; /* Next region has already been overtaken */
- if (!ret && mm->attr == *attr)
+ if ((ret == 0U) && (mm->attr == *attr))
continue; /* Region doesn't override attribs so skip */
- if (mm->base_va > base_va ||
- mm->base_va + mm->size - 1 < base_va + size - 1)
- return -1; /* Region doesn't fully cover our area */
+ if ((mm->base_va > base_va) ||
+ ((mm->base_va + mm->size - 1U) < (base_va + size - 1U)))
+ return MT_UNKNOWN; /* Region doesn't fully cover area */
*attr = mm->attr;
- ret = 0;
+ ret = 0U;
}
return ret;
}
@@ -318,7 +323,8 @@
uint64_t *table,
unsigned int level)
{
- assert(level >= XLAT_TABLE_LEVEL_MIN && level <= XLAT_TABLE_LEVEL_MAX);
+ assert((level >= XLAT_TABLE_LEVEL_MIN) &&
+ (level <= XLAT_TABLE_LEVEL_MAX));
unsigned int level_size_shift =
L0_XLAT_ADDRESS_SHIFT - level * XLAT_TABLE_ENTRIES_SHIFT;
@@ -331,10 +337,10 @@
do {
uint64_t desc = UNSET_DESC;
- if (!mm->size) {
+ if (mm->size == 0U) {
/* Done mapping regions; finish zeroing the table */
desc = INVALID_DESC;
- } else if (mm->base_va + mm->size - 1 < base_va) {
+ } else if ((mm->base_va + mm->size - 1U) < base_va) {
/* This area is after the region so get next region */
++mm;
continue;
@@ -343,7 +349,7 @@
debug_print("%s VA:%p size:0x%llx ", get_level_spacer(level),
(void *)base_va, (unsigned long long)level_size);
- if (mm->base_va > base_va + level_size - 1) {
+ if (mm->base_va > (base_va + level_size - 1U)) {
/* Next region is after this area. Nothing to map yet */
desc = INVALID_DESC;
/* Make sure that the current level allows block descriptors */
@@ -354,9 +360,10 @@
* it will return the innermost region's attributes.
*/
unsigned int attr;
- int r = mmap_region_attr(mm, base_va, level_size, &attr);
+ unsigned int r = mmap_region_attr(mm, base_va,
+ level_size, &attr);
- if (!r) {
+ if (r == 0U) {
desc = mmap_desc(attr,
base_va - mm->base_va + mm->base_pa,
level);
@@ -365,13 +372,15 @@
if (desc == UNSET_DESC) {
/* Area not covered by a region so need finer table */
- uint64_t *new_table = xlat_tables[next_xlat++];
+ uint64_t *new_table = xlat_tables[next_xlat];
+
+ next_xlat++;
assert(next_xlat <= MAX_XLAT_TABLES);
desc = TABLE_DESC | (uintptr_t)new_table;
/* Recurse to fill in new table */
mm = init_xlation_table_inner(mm, base_va,
- new_table, level+1);
+ new_table, level + 1U);
}
debug_print("\n");
@@ -379,7 +388,7 @@
*table++ = desc;
base_va += level_size;
} while ((base_va & level_index_mask) &&
- (base_va - 1 < PLAT_VIRT_ADDR_SPACE_SIZE - 1));
+ ((base_va - 1U) < (PLAT_VIRT_ADDR_SPACE_SIZE - 1U)));
return mm;
}
@@ -388,15 +397,15 @@
unsigned int level, uintptr_t *max_va,
unsigned long long *max_pa)
{
- int el = xlat_arch_current_el();
+ unsigned int el = xlat_arch_current_el();
execute_never_mask = xlat_arch_get_xn_desc(el);
- if (el == 3) {
+ if (el == 3U) {
ap1_mask = LOWER_ATTRS(AP_ONE_VA_RANGE_RES1);
} else {
- assert(el == 1);
- ap1_mask = 0;
+ assert(el == 1U);
+ ap1_mask = 0ULL;
}
init_xlation_table_inner(mmap, base_va, table, level);
diff --git a/lib/xlat_tables/xlat_tables_private.h b/lib/xlat_tables/xlat_tables_private.h
index 810c48e..f882f7e 100644
--- a/lib/xlat_tables/xlat_tables_private.h
+++ b/lib/xlat_tables/xlat_tables_private.h
@@ -1,11 +1,11 @@
/*
- * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __XLAT_TABLES_PRIVATE_H__
-#define __XLAT_TABLES_PRIVATE_H__
+#ifndef XLAT_TABLES_PRIVATE_H
+#define XLAT_TABLES_PRIVATE_H
#include <cassert.h>
#include <platform_def.h>
@@ -44,17 +44,17 @@
void print_mmap(void);
/* Returns the current Exception Level. The returned EL must be 1 or higher. */
-int xlat_arch_current_el(void);
+unsigned int xlat_arch_current_el(void);
/*
* Returns the bit mask that has to be ORed to the rest of a translation table
* descriptor so that execution of code is prohibited at the given Exception
* Level.
*/
-uint64_t xlat_arch_get_xn_desc(int el);
+uint64_t xlat_arch_get_xn_desc(unsigned int el);
void init_xlation_table(uintptr_t base_va, uint64_t *table,
unsigned int level, uintptr_t *max_va,
unsigned long long *max_pa);
-#endif /* __XLAT_TABLES_PRIVATE_H__ */
+#endif /* XLAT_TABLES_PRIVATE_H */