Fix misra warnings in SMC and power mgmt code
Change-Id: Ia00eba2b18804e6498d935d33ec104953e0e5e03
Signed-off-by: Sathees Balya <sathees.balya@arm.com>
diff --git a/plat/arm/board/fvp/fvp_pm.c b/plat/arm/board/fvp/fvp_pm.c
index 065ecc1..7b85043 100644
--- a/plat/arm/board/fvp/fvp_pm.c
+++ b/plat/arm/board/fvp/fvp_pm.c
@@ -153,7 +153,7 @@
*/
do {
psysr = fvp_pwrc_read_psysr(mpidr);
- } while (psysr & PSYSR_AFF_L0);
+ } while ((psysr & PSYSR_AFF_L0) != 0U);
fvp_pwrc_write_pponr(mpidr);
return rc;
@@ -312,7 +312,7 @@
* The format of 'power_level' is implementation-defined, but 0 must
* mean a CPU. We also allow 1 to denote the cluster
*/
- if (power_level != ARM_PWR_LVL0 && power_level != ARM_PWR_LVL1)
+ if ((power_level != ARM_PWR_LVL0) && (power_level != ARM_PWR_LVL1))
return PSCI_E_INVALID_PARAMS;
/*
@@ -325,10 +325,10 @@
return PSCI_E_INVALID_PARAMS;
if (power_level == ARM_PWR_LVL0) {
- ret = (psysr & PSYSR_AFF_L0) ? HW_ON : HW_OFF;
+ ret = ((psysr & PSYSR_AFF_L0) != 0U) ? HW_ON : HW_OFF;
} else {
/* power_level == ARM_PWR_LVL1 */
- ret = (psysr & PSYSR_AFF_L1) ? HW_ON : HW_OFF;
+ ret = ((psysr & PSYSR_AFF_L1) != 0U) ? HW_ON : HW_OFF;
}
return ret;