diff --git a/plat/imx/imx8ulp/dram.c b/plat/imx/imx8ulp/dram.c
index d8738ae..00a5220 100644
--- a/plat/imx/imx8ulp/dram.c
+++ b/plat/imx/imx8ulp/dram.c
@@ -25,7 +25,6 @@
 
 #define IMX_DDRC_BASE			U(0x2E060000)
 #define SAVED_DRAM_DATA_BASE		U(0x20055000)
-#define IMX_DRAM_BASE			U(0x80000000)
 #define DENALI_CTL_143			U(0x23C)
 #define DENALI_CTL_144			U(0x240)
 #define DENALI_CTL_146			U(0x248)
@@ -233,7 +232,7 @@
 		/* 0.b Disable DDRC auto low-power mode interface */
 		mmio_clrbits_32(IMX_DDRC_BASE + DENALI_CTL_146, LP_AUTO_ENTRY_EN << 24);
 		/* 0.c Read any location to get DRAM out of Self-refresh */
-		mmio_read_32(IMX_DRAM_BASE);
+		mmio_read_32(DEVICE2_BASE);
 		/* 0.d Confirm DRAM is out of Self-refresh */
 		while ((mmio_read_32(IMX_DDRC_BASE + DENALI_CTL_146) &
 			LP_STATE_CS_PD_CG) != LP_STATE_CS_IDLE) {
diff --git a/plat/imx/imx8ulp/include/platform_def.h b/plat/imx/imx8ulp/include/platform_def.h
index 31d4791..6674fcb 100644
--- a/plat/imx/imx8ulp/include/platform_def.h
+++ b/plat/imx/imx8ulp/include/platform_def.h
@@ -43,8 +43,13 @@
 #define PLAT_VIRT_ADDR_SPACE_SIZE	(1ull << 32)
 #define PLAT_PHY_ADDR_SPACE_SIZE	(1ull << 32)
 
+#ifdef SPD_trusty
+#define MAX_XLAT_TABLES			11
+#define MAX_MMAP_REGIONS		12
+#else
 #define MAX_XLAT_TABLES			8
 #define MAX_MMAP_REGIONS		9
+#endif
 
 #define PLAT_GICD_BASE			U(0x2d400000)
 #define PLAT_GICR_BASE			U(0x2d440000)
@@ -52,8 +57,8 @@
 #define DEVICE0_SIZE			U(0x10000000)
 #define DEVICE1_BASE			U(0x30000000)
 #define DEVICE1_SIZE			U(0x10000000)
-#define DEVICE2_BASE			U(0x80000000)
-#define DEVICE2_SIZE			U(0x01000000)
+#define DEVICE2_BASE			U(0x8ff00000)
+#define DEVICE2_SIZE			U(0x00001000)
 #define IMX_LPUART4_BASE		U(0x29390000)
 #define IMX_LPUART5_BASE		U(0x293a0000)
 #define IMX_LPUART_BASE			IMX_LPUART5_BASE