commit 4f84cc182bd5b6f699ec27970b9daf9ecc79ce3e
author Joanna Farley <joanna.farley@arm.com> Mon Jan 17 18:37:53 2022 +0100
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> Mon Jan 17 18:37:53 2022 +0100
tree 04cc2ea6855be55ae646406194bfd9074e41d48d
parent 7637709731391277e55d125c3388aa5d9a4b8364
parent d8444a70021f1f1fd2274a969432a7d9510858ee

Merge "feat(cpu/cortex_a53): add L1PCTL macro definiton for CPUACTLR_EL1" into integration

include/lib/cpus/aarch64/cortex_a53.h

diff --git a/include/lib/cpus/aarch64/cortex_a53.h b/include/lib/cpus/aarch64/cortex_a53.h
index 6fe67a9..54e646c 100644
--- a/include/lib/cpus/aarch64/cortex_a53.h
+++ b/include/lib/cpus/aarch64/cortex_a53.h
@@ -52,6 +52,8 @@
 #define CORTEX_A53_CPUACTLR_EL1_L1RADIS			(ULL(3) << CORTEX_A53_CPUACTLR_EL1_L1RADIS_SHIFT)
 #define CORTEX_A53_CPUACTLR_EL1_DTAH_SHIFT		U(24)
 #define CORTEX_A53_CPUACTLR_EL1_DTAH			(ULL(1) << CORTEX_A53_CPUACTLR_EL1_DTAH_SHIFT)
+#define CORTEX_A53_CPUACTLR_EL1_L1PCTL_SHIFT		U(13)
+#define CORTEX_A53_CPUACTLR_EL1_L1PCTL			(ULL(7) << CORTEX_A53_CPUACTLR_EL1_L1PCTL_SHIFT)
 
 /*******************************************************************************
  * L2 Auxiliary Control register specific definitions.