Use ARM CCI driver on FVP and Juno platforms
This patch updates the FVP and Juno platform ports to use the common
driver for ARM Cache Coherent Interconnects.
Change-Id: Ib142f456b9b673600592616a2ec99e9b230d6542
diff --git a/plat/juno/aarch64/juno_common.c b/plat/juno/aarch64/juno_common.c
index 371323e..6b6e185 100644
--- a/plat/juno/aarch64/juno_common.c
+++ b/plat/juno/aarch64/juno_common.c
@@ -32,6 +32,7 @@
#include <arm_gic.h>
#include <assert.h>
#include <bl_common.h>
+#include <cci.h>
#include <debug.h>
#include <mmio.h>
#include <platform.h>
@@ -136,6 +137,18 @@
IRQ_SEC_SGI_7
};
+static const int cci_map[] = {
+ CCI400_CLUSTER0_SL_IFACE_IX,
+ CCI400_CLUSTER1_SL_IFACE_IX
+};
+
+void plat_cci_init(void)
+{
+ cci_init(CCI400_BASE,
+ cci_map,
+ ARRAY_SIZE(cci_map));
+}
+
/*******************************************************************************
* Macro generating the code for the function setting up the pagetables as per
* the platform memory map & initialize the mmu, for the given exception level
diff --git a/plat/juno/bl1_plat_setup.c b/plat/juno/bl1_plat_setup.c
index 23e8592..fd331bf 100644
--- a/plat/juno/bl1_plat_setup.c
+++ b/plat/juno/bl1_plat_setup.c
@@ -31,7 +31,7 @@
#include <arch_helpers.h>
#include <assert.h>
#include <bl_common.h>
-#include <cci400.h>
+#include <cci.h>
#include <console.h>
#include <debug.h>
#include <mmio.h>
@@ -82,10 +82,8 @@
* Enable CCI-400 for this cluster. No need for locks as no other cpu is
* active at the moment
*/
- cci_init(CCI400_BASE,
- CCI400_SL_IFACE3_CLUSTER_IX,
- CCI400_SL_IFACE4_CLUSTER_IX);
- cci_enable_cluster_coherency(read_mpidr());
+ plat_cci_init();
+ cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr()));
/* Allow BL1 to see the whole Trusted RAM */
bl1_tzram_layout.total_base = TZRAM_BASE;
diff --git a/plat/juno/bl31_plat_setup.c b/plat/juno/bl31_plat_setup.c
index 1d33768..194d620 100644
--- a/plat/juno/bl31_plat_setup.c
+++ b/plat/juno/bl31_plat_setup.c
@@ -33,7 +33,7 @@
#include <assert.h>
#include <bl31.h>
#include <bl_common.h>
-#include <cci400.h>
+#include <cci.h>
#include <console.h>
#include <mmio.h>
#include <platform.h>
@@ -123,9 +123,7 @@
* a warm boot. BL1 should have already enabled CCI coherency for this
* cluster during cold boot.
*/
- cci_init(CCI400_BASE,
- CCI400_SL_IFACE3_CLUSTER_IX,
- CCI400_SL_IFACE4_CLUSTER_IX);
+ plat_cci_init();
/*
* Check params passed from BL2 should not be NULL,
diff --git a/plat/juno/include/plat_macros.S b/plat/juno/include/plat_macros.S
index a9d2466..ac1077b 100644
--- a/plat/juno/include/plat_macros.S
+++ b/plat/juno/include/plat_macros.S
@@ -28,7 +28,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
-#include <cci400.h>
+#include <cci.h>
#include <gic_v2.h>
#include "platform_def.h"
#include "../juno_def.h"
diff --git a/plat/juno/juno_def.h b/plat/juno/juno_def.h
index 62bdda3..ab39f3c 100644
--- a/plat/juno/juno_def.h
+++ b/plat/juno/juno_def.h
@@ -261,8 +261,8 @@
* CCI-400 related constants
******************************************************************************/
#define CCI400_BASE 0x2c090000
-#define CCI400_SL_IFACE3_CLUSTER_IX 1
-#define CCI400_SL_IFACE4_CLUSTER_IX 0
+#define CCI400_CLUSTER0_SL_IFACE_IX 4
+#define CCI400_CLUSTER1_SL_IFACE_IX 3
/*******************************************************************************
* SCP <=> AP boot configuration
diff --git a/plat/juno/juno_private.h b/plat/juno/juno_private.h
index 9a5944c..afb1bfc 100644
--- a/plat/juno/juno_private.h
+++ b/plat/juno/juno_private.h
@@ -154,6 +154,7 @@
unsigned long platform_get_stack(unsigned long mpidr);
uint64_t plat_get_syscnt_freq(void);
void plat_gic_init(void);
+void plat_cci_init(void);
/* Declarations for plat_topology.c */
int plat_setup_topology(void);
diff --git a/plat/juno/plat_pm.c b/plat/juno/plat_pm.c
index 47338cf..953e5f7 100644
--- a/plat/juno/plat_pm.c
+++ b/plat/juno/plat_pm.c
@@ -31,8 +31,8 @@
#include <assert.h>
#include <arch_helpers.h>
#include <arm_gic.h>
+#include <cci.h>
#include <debug.h>
-#include <cci400.h>
#include <errno.h>
#include <platform.h>
#include <platform_def.h>
@@ -159,8 +159,7 @@
* if this cluster was off.
*/
if (afflvl != MPIDR_AFFLVL0)
- cci_enable_cluster_coherency(mpidr);
-
+ cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(mpidr));
/* Enable the gic cpu interface */
arm_gic_cpuif_setup();
@@ -187,7 +186,7 @@
/* Cluster is to be turned off, so disable coherency */
if (afflvl > MPIDR_AFFLVL0) {
- cci_disable_cluster_coherency(read_mpidr_el1());
+ cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr()));
cluster_state = scpi_power_off;
}
diff --git a/plat/juno/platform.mk b/plat/juno/platform.mk
index 8beaecf..9e44b23 100644
--- a/plat/juno/platform.mk
+++ b/plat/juno/platform.mk
@@ -56,7 +56,7 @@
plat/common/plat_gic.c \
plat/juno/plat_io_storage.c
-BL1_SOURCES += drivers/arm/cci400/cci400.c \
+BL1_SOURCES += drivers/arm/cci/cci.c \
lib/cpus/aarch64/cortex_a53.S \
lib/cpus/aarch64/cortex_a57.S \
plat/common/aarch64/platform_up_stack.S \
@@ -75,7 +75,7 @@
plat/juno/scp_bootloader.c \
plat/juno/scpi.c
-BL31_SOURCES += drivers/arm/cci400/cci400.c \
+BL31_SOURCES += drivers/arm/cci/cci.c \
drivers/arm/gic/arm_gic.c \
drivers/arm/gic/gic_v2.c \
drivers/arm/gic/gic_v3.c \