Merge changes from topic "st_remove_shm" into integration
* changes:
docs(stm32mp15): mark STM32MP15_OPTEE_RSV_SHM deprecated
feat(stm32mp15): disable OP-TEE shared memory
diff --git a/Makefile b/Makefile
index 907ae21..6a2eeca 100644
--- a/Makefile
+++ b/Makefile
@@ -370,8 +370,10 @@
# GCC automatically adds fix-cortex-a53-843419 flag when used to link
# which breaks some builds, so disable if errata fix is not explicitly enabled
- ifneq (${ERRATA_A53_843419},1)
- TF_LDFLAGS += -mno-fix-cortex-a53-843419
+ ifeq (${ARCH},aarch64)
+ ifneq (${ERRATA_A53_843419},1)
+ TF_LDFLAGS += -mno-fix-cortex-a53-843419
+ endif
endif
TF_LDFLAGS += -nostdlib
TF_LDFLAGS += $(subst --,-Xlinker --,$(TF_LDFLAGS_$(ARCH)))
diff --git a/docs/about/maintainers.rst b/docs/about/maintainers.rst
index 6042053..aca5ec0 100644
--- a/docs/about/maintainers.rst
+++ b/docs/about/maintainers.rst
@@ -422,6 +422,15 @@
:|F|: lib/gpt_rme
:|F|: include/lib/gpt_rme
+Firmware Handoff Library (Transfer List)
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+:|M|: Raymond Mao <raymond.mao@linaro.org>
+:|G|: `raymo200915`_
+:|M|: Harrison Mutai <harrison.mutai@arm.com>
+:|G|: `harrisonmutai-arm`_
+:|F|: lib/transfer_list
+:|F|: include/lib/transfer_list.h
+
Platform Ports
~~~~~~~~~~~~~~
@@ -748,8 +757,6 @@
Renesas rcar-gen3 platform port
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-:|M|: Jorge Ramirez-Ortiz <jramirez@baylibre.com>
-:|G|: `ldts`_
:|M|: Marek Vasut <marek.vasut@gmail.com>
:|G|: `marex`_
:|F|: docs/plat/rcar-gen3.rst
@@ -959,7 +966,6 @@
.. _jwerner-chromium: https://github.com/jwerner-chromium
.. _kostapr: https://github.com/kostapr
.. _lachitp: https://github.com/lachitp
-.. _ldts: https://github.com/ldts
.. _marex: https://github.com/marex
.. _masahir0y: https://github.com/masahir0y
.. _michalsimek: https://github.com/michalsimek
@@ -1028,3 +1034,5 @@
.. _rutigl: https://github.com/rutigl
.. _avifishman: https://github.com/avifishman
.. _xueliang-zhong-arm: https://github.com/xueliang-zhong-arm
+.. _raymo200915: https://github.com/raymo200915
+.. _harrisonmutai-arm: https://github.com/harrisonmutai-arm
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst
index ad05a50..1daad9b 100644
--- a/docs/design/cpu-specific-build-macros.rst
+++ b/docs/design/cpu-specific-build-macros.rst
@@ -761,6 +761,11 @@
in r0p3. The issue is also present in r0p0 and r0p1 but there is no
workaround for those revisions.
+- ``ERRATA_A510_2080326``: This applies errata 2080326 workaround to
+ Cortex-A510 CPU. This needs to be enabled only for revision r0p2 and is
+ fixed in r0p3. This issue is also present in r0p0 and r0p1 but there is no
+ workaround for those revisions.
+
- ``ERRATA_A510_2250311``: This applies errata 2250311 workaround to
Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2,
r0p3 and r1p0, it is fixed in r1p1. This workaround disables MPMM even if
diff --git a/drivers/renesas/common/ddr/ddr_b/boot_init_dram.c b/drivers/renesas/common/ddr/ddr_b/boot_init_dram.c
index 8d002de..3f6a948 100644
--- a/drivers/renesas/common/ddr/ddr_b/boot_init_dram.c
+++ b/drivers/renesas/common/ddr/ddr_b/boot_init_dram.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2021, Renesas Electronics Corporation.
+ * Copyright (c) 2015-2023, Renesas Electronics Corporation.
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@@ -1180,6 +1180,11 @@
ddrtbl_getval(_cnf_DDR_PHY_ADR_G_REGSET,
_reg_PHY_LP4_BOOT_TOP_PLL_CTRL
));
+ if (ddrtbl_getval(_cnf_DDR_PHY_ADR_G_REGSET, _reg_PHY_LP4_BOOT_LOW_FREQ_SEL)) {
+ reg_ddrphy_write_a(ddr_regdef_adr(_reg_PHY_LP4_BOOT_LOW_FREQ_SEL),
+ _cnf_DDR_PHY_ADR_G_REGSET[0x7f & ddr_regdef_adr(
+ _reg_PHY_LP4_BOOT_LOW_FREQ_SEL)]);
+ }
}
reg_ddrphy_write_a(ddr_regdef_adr(_reg_PHY_LPDDR3_CS),
@@ -2856,6 +2861,16 @@
timeout = wait_freqchgreq(1);
+ if ((!((prr_product == PRR_PRODUCT_H3) && (prr_cut <= PRR_PRODUCT_11))) && (on)) {
+ if (((1600U * ddr_mbpsdiv) < ddr_mbps) || (prr_product == PRR_PRODUCT_M3)) {
+ reg_ddrphy_write_a(ddr_regdef_adr(_reg_PHY_PLL_CTRL), 0x01421142U);
+ reg_ddrphy_write_a(ddr_regdef_adr(_reg_PHY_PLL_CTRL_CA), 0x00000142U);
+ } else {
+ reg_ddrphy_write_a(ddr_regdef_adr(_reg_PHY_PLL_CTRL), 0x03421342U);
+ reg_ddrphy_write_a(ddr_regdef_adr(_reg_PHY_PLL_CTRL_CA), 0x00000342U);
+ }
+ }
+
if (timeout) {
return 1;
}
diff --git a/drivers/renesas/common/ddr/ddr_b/boot_init_dram_regdef.h b/drivers/renesas/common/ddr/ddr_b/boot_init_dram_regdef.h
index 3cb1975..328adbf 100644
--- a/drivers/renesas/common/ddr/ddr_b/boot_init_dram_regdef.h
+++ b/drivers/renesas/common/ddr/ddr_b/boot_init_dram_regdef.h
@@ -1,11 +1,11 @@
/*
- * Copyright (c) 2015-2021, Renesas Electronics Corporation.
+ * Copyright (c) 2015-2023, Renesas Electronics Corporation.
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#define RCAR_DDR_VERSION "rev.0.41"
+#define RCAR_DDR_VERSION "rev.0.42"
#define DRAM_CH_CNT 0x04
#define SLICE_CNT 0x04
#define CS_CNT 0x02
diff --git a/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_h3ver2.h b/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_h3ver2.h
index e5258af..5a662ec 100644
--- a/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_h3ver2.h
+++ b/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_h3ver2.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2019, Renesas Electronics Corporation.
+ * Copyright (c) 2015-2023, Renesas Electronics Corporation.
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@@ -230,8 +230,8 @@
/*0693*/ 0x00000000,
/*0694*/ 0x00000000,
/*0695*/ 0x00005064,
- /*0696*/ 0x01421142,
- /*0697*/ 0x00000142,
+ /*0696*/ 0x05421542,
+ /*0697*/ 0x00000542,
/*0698*/ 0x00000000,
/*0699*/ 0x000f1100,
/*069a*/ 0x0f110f11,
@@ -240,12 +240,12 @@
/*069d*/ 0x0002c000,
/*069e*/ 0x02c002c0,
/*069f*/ 0x000002c0,
- /*06a0*/ 0x03421342,
- /*06a1*/ 0x00000342,
+ /*06a0*/ 0x05421542,
+ /*06a1*/ 0x00000542,
/*06a2*/ 0x00000000,
/*06a3*/ 0x00000000,
/*06a4*/ 0x05020000,
- /*06a5*/ 0x14000000,
+ /*06a5*/ 0x14000001,
/*06a6*/ 0x027f6e00,
/*06a7*/ 0x047f027f,
/*06a8*/ 0x00027f6e,
diff --git a/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_m3.h b/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_m3.h
index b491f0e..482a2a5 100644
--- a/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_m3.h
+++ b/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_m3.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2019, Renesas Electronics Corporation.
+ * Copyright (c) 2015-2023, Renesas Electronics Corporation.
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@@ -210,8 +210,8 @@
/*0b8b*/ 0x01010100,
/*0b8c*/ 0x00000600,
/*0b8d*/ 0x50640000,
- /*0b8e*/ 0x01421142,
- /*0b8f*/ 0x00000142,
+ /*0b8e*/ 0x03421342,
+ /*0b8f*/ 0x00000342,
/*0b90*/ 0x00000000,
/*0b91*/ 0x000f1600,
/*0b92*/ 0x0f160f16,
diff --git a/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_m3n.h b/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_m3n.h
index fb3032d..436c1a0 100644
--- a/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_m3n.h
+++ b/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_m3n.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2020, Renesas Electronics Corporation.
+ * Copyright (c) 2015-2023, Renesas Electronics Corporation.
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@@ -230,8 +230,8 @@
/*0b93*/ 0x00000000,
/*0b94*/ 0x00000000,
/*0b95*/ 0x00005064,
- /*0b96*/ 0x01421142,
- /*0b97*/ 0x00000142,
+ /*0b96*/ 0x05421542,
+ /*0b97*/ 0x00000542,
/*0b98*/ 0x00000000,
/*0b99*/ 0x000f1600,
/*0b9a*/ 0x0f160f16,
@@ -241,12 +241,12 @@
/*0b9e*/ 0x02c002c0,
/*0b9f*/ 0x000002c0,
/*0ba0*/ 0x08040201,
- /*0ba1*/ 0x03421342,
- /*0ba2*/ 0x00000342,
+ /*0ba1*/ 0x05421542,
+ /*0ba2*/ 0x00000542,
/*0ba3*/ 0x00000000,
/*0ba4*/ 0x00000000,
/*0ba5*/ 0x05030000,
- /*0ba6*/ 0x00010700,
+ /*0ba6*/ 0x00010701,
/*0ba7*/ 0x00000014,
/*0ba8*/ 0x00027f6e,
/*0ba9*/ 0x047f027f,
diff --git a/drivers/renesas/rcar/board/board.h b/drivers/renesas/rcar/board/board.h
index 51a8e30..2346911 100644
--- a/drivers/renesas/rcar/board/board.h
+++ b/drivers/renesas/rcar/board/board.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights
+ * Copyright (c) 2015-2023, Renesas Electronics Corporation. All rights
* reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@@ -11,13 +11,13 @@
#define BOARD_SALVATOR_X (0x00)
#define BOARD_KRIEK (0x01)
#define BOARD_STARTER_KIT (0x02)
+#define BOARD_EAGLE (0x03)
#define BOARD_SALVATOR_XS (0x04)
+#define BOARD_DRAAK (0x07)
#define BOARD_EBISU (0x08)
#define BOARD_STARTER_KIT_PRE (0x0B)
-#define BOARD_EBISU_4D (0x0DU)
-#define BOARD_DRAAK (0x0EU)
-#define BOARD_EAGLE (0x0FU)
-#define BOARD_UNKNOWN (BOARD_EAGLE + 1U)
+#define BOARD_EBISU_4D (0x0D)
+#define BOARD_UNKNOWN (BOARD_EBISU_4D + 1U)
#define BOARD_REV_UNKNOWN (0xFF)
diff --git a/include/plat/arm/common/arm_sip_svc.h b/include/plat/arm/common/arm_sip_svc.h
index 025d10e..266092e 100644
--- a/include/plat/arm/common/arm_sip_svc.h
+++ b/include/plat/arm/common/arm_sip_svc.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2019,2021-2022, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2019,2021-2023, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -35,4 +35,21 @@
#define ARM_SIP_SVC_VERSION_MAJOR U(0x0)
#define ARM_SIP_SVC_VERSION_MINOR U(0x2)
+/*
+ * Arm SiP SMC calls that are primarily used for testing purposes.
+ */
+#if PLAT_TEST_SPM
+#define ARM_SIP_SET_INTERRUPT_PENDING U(0x82000100)
+#endif
+
+/* SiP handler specific to each Arm platform. */
+uintptr_t plat_arm_sip_handler(uint32_t smc_fid,
+ u_register_t x1,
+ u_register_t x2,
+ u_register_t x3,
+ u_register_t x4,
+ void *cookie,
+ void *handle,
+ u_register_t flags);
+
#endif /* ARM_SIP_SVC_H */
diff --git a/lib/cpus/aarch64/cortex_a510.S b/lib/cpus/aarch64/cortex_a510.S
index 6fce24e..a59b92c 100644
--- a/lib/cpus/aarch64/cortex_a510.S
+++ b/lib/cpus/aarch64/cortex_a510.S
@@ -57,6 +57,30 @@
check_erratum_ls cortex_a510, ERRATUM(2042739), CPU_REV(0, 2)
+workaround_reset_start cortex_a510, ERRATUM(2080326), ERRATA_A510_2080326
+ /* Apply workaround */
+ mov x0, #1
+ msr S3_6_C15_C4_0, x0
+ isb
+
+ mov x0, #0x0100
+ movk x0, #0x0E08, lsl #16
+ msr S3_6_C15_C4_2, x0
+
+ mov x0, #0x0300
+ movk x0, #0x0F1F, lsl #16
+ movk x0, #0x0008, lsl #32
+ msr S3_6_C15_C4_3, x0
+
+ mov x0, #0x03F1
+ movk x0, #0x00C0, lsl #16
+ msr S3_6_C15_C4_1, x0
+
+ isb
+workaround_reset_end cortex_a510, ERRATUM(2080326)
+
+check_erratum_range cortex_a510, ERRATUM(2080326), CPU_REV(0, 2), CPU_REV(0, 2)
+
workaround_reset_start cortex_a510, ERRATUM(2172148), ERRATA_A510_2172148
/*
* Force L2 allocation of transient lines by setting
diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk
index e12795f..e7b0e54 100644
--- a/lib/cpus/cpu-ops.mk
+++ b/lib/cpus/cpu-ops.mk
@@ -769,6 +769,11 @@
# present in r0p0 and r0p1 but there is no workaround for those revisions.
CPU_FLAG_LIST += ERRATA_A510_2041909
+# Flag to aply erratum 2080326 workaround during reset. This erratum applies
+# to revision r0p2 of the Cortex-A510 cpu and is fixed in r0p3. The issue is
+# also present in r0p0 and r0p1 but there is no workaround for those revisions.
+CPU_FLAG_LIST += ERRATA_A510_2080326
+
# Flag to apply erratum 2250311 workaround during reset. This erratum applies
# to revisions r0p0, r0p1, r0p2, r0p3 and r1p0, and is fixed in r1p1.
CPU_FLAG_LIST += ERRATA_A510_2250311
diff --git a/make_helpers/build_macros.mk b/make_helpers/build_macros.mk
index a5c93a6..71cf18b 100644
--- a/make_helpers/build_macros.mk
+++ b/make_helpers/build_macros.mk
@@ -558,7 +558,7 @@
$(ELF): $(OBJS) $(DEFAULT_LINKER_SCRIPT) $(LINKER_SCRIPTS) | $(1)_dirs libraries $(BL_LIBS)
$$(ECHO) " LD $$@"
ifdef MAKE_BUILD_STRINGS
- $(call MAKE_BUILD_STRINGS, $(BUILD_DIR)/build_message.o)
+ $(call MAKE_BUILD_STRINGS,$(BUILD_DIR)/build_message.o)
else
@echo 'const char build_message[] = "Built : "$(BUILD_MESSAGE_TIMESTAMP); \
const char version_string[] = "${VERSION_STRING}"; \
diff --git a/make_helpers/windows.mk b/make_helpers/windows.mk
index b6d6f0b..ac0f940 100644
--- a/make_helpers/windows.mk
+++ b/make_helpers/windows.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2016-2022, Arm Limited and Contributors. All rights reserved.
+# Copyright (c) 2016-2023, Arm Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -83,8 +83,9 @@
VERSION_STRING_MESSAGE = const char version_string[] = "${VERSION_STRING}";
VERSION_MESSAGE = const char version[] = "${VERSION}";
define MAKE_BUILD_STRINGS
+ $$(file >$1.in,$$(TF_CFLAGS) $$(CFLAGS))
@echo $$(BUILT_TIME_DATE_STRING) $$(VERSION_STRING_MESSAGE) $$(VERSION_MESSAGE) | \
- $$(CC) $$(TF_CFLAGS) $$(CFLAGS) -x c -c - -o $1
+ $$(CC) @$1.in -x c -c - -o $1
endef
MSVC_NMAKE := nmake.exe
diff --git a/plat/arm/board/fvp/fdts/fvp_spmc_manifest.dts b/plat/arm/board/fvp/fdts/fvp_spmc_manifest.dts
index 4f97339..e159248 100644
--- a/plat/arm/board/fvp/fdts/fvp_spmc_manifest.dts
+++ b/plat/arm/board/fvp/fdts/fvp_spmc_manifest.dts
@@ -35,6 +35,11 @@
load_address = <0x7000000>;
vcpu_count = <8>;
mem_size = <1048576>;
+ /*
+ * Platform specific SiP SMC call handled at EL3. Used
+ * to pend an interrupt for testing purpose.
+ */
+ smc_whitelist = <0x82000100>;
};
vm2 {
is_ffa_partition;
diff --git a/plat/arm/board/fvp/platform.mk b/plat/arm/board/fvp/platform.mk
index 3c02485..72f94b0 100644
--- a/plat/arm/board/fvp/platform.mk
+++ b/plat/arm/board/fvp/platform.mk
@@ -28,6 +28,9 @@
# the FVP platform. This option defaults to 256.
FVP_TRUSTED_SRAM_SIZE := 256
+# Macro to enable helpers for running SPM tests. Disabled by default.
+PLAT_TEST_SPM := 0
+
# This is a very trickly TEMPORARY fix. Enabling ALL features exceeds BL31's
# progbits limit. We need a way to build all useful configurations while waiting
# on the fvp to increase its SRAM size. The problem is twofild:
@@ -535,3 +538,6 @@
ifeq (${ERRATA_ABI_SUPPORT}, 1)
include plat/arm/board/fvp/fvp_cpu_errata.mk
endif
+
+# Build macro necessary for running SPM tests on FVP platform
+$(eval $(call add_define,PLAT_TEST_SPM))
diff --git a/plat/arm/common/arm_common.mk b/plat/arm/common/arm_common.mk
index 41d1b66..421c8e9 100644
--- a/plat/arm/common/arm_common.mk
+++ b/plat/arm/common/arm_common.mk
@@ -331,9 +331,11 @@
ifeq (${ARCH}, aarch64)
BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c\
plat/arm/common/arm_sip_svc.c \
+ plat/arm/common/plat_arm_sip_svc.c \
${ARM_SVC_HANDLER_SRCS}
else
BL32_SOURCES += plat/arm/common/arm_sip_svc.c \
+ plat/arm/common/plat_arm_sip_svc.c \
${ARM_SVC_HANDLER_SRCS}
endif
endif
diff --git a/plat/arm/common/arm_sip_svc.c b/plat/arm/common/arm_sip_svc.c
index 352d477..09226f4 100644
--- a/plat/arm/common/arm_sip_svc.c
+++ b/plat/arm/common/arm_sip_svc.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2023, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2023, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -13,9 +13,6 @@
#include <lib/pmf/pmf.h>
#include <plat/arm/common/arm_sip_svc.h>
#include <plat/arm/common/plat_arm.h>
-#if ENABLE_SPMD_LP
-#include <services/el3_spmd_logical_sp.h>
-#endif
#include <tools_share/uuid.h>
/* ARM SiP Service UUID */
@@ -136,15 +133,16 @@
SMC_RET2(handle, ARM_SIP_SVC_VERSION_MAJOR, ARM_SIP_SVC_VERSION_MINOR);
default:
-#if ENABLE_SPMD_LP
- return plat_spmd_logical_sp_smc_handler(smc_fid, x1, x2, x3, x4,
- cookie, handle, flags);
-#else
- WARN("Unimplemented ARM SiP Service Call: 0x%x \n", smc_fid);
- SMC_RET1(handle, SMC_UNK);
-#endif
+ break;
}
+ /*
+ * Fall back to allow Arm platform specific handler.
+ * TODO: Refactor needed to move out generic handlers from this file and
+ * only keep Arm Platform specific handlers here.
+ */
+ return plat_arm_sip_handler(smc_fid, x1, x2, x3, x4,
+ cookie, handle, flags);
}
diff --git a/plat/arm/common/plat_arm_sip_svc.c b/plat/arm/common/plat_arm_sip_svc.c
new file mode 100644
index 0000000..b1dab16
--- /dev/null
+++ b/plat/arm/common/plat_arm_sip_svc.c
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2023, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <stdint.h>
+
+#include <common/debug.h>
+#include <common/runtime_svc.h>
+
+#include <plat/arm/common/arm_sip_svc.h>
+#include <plat/common/platform.h>
+
+#if ENABLE_SPMD_LP
+#include <services/el3_spmd_logical_sp.h>
+#endif
+
+uintptr_t plat_arm_sip_handler(uint32_t smc_fid,
+ u_register_t x1,
+ u_register_t x2,
+ u_register_t x3,
+ u_register_t x4,
+ void *cookie,
+ void *handle,
+ u_register_t flags)
+{
+#if PLAT_TEST_SPM
+ bool secure_origin;
+
+ /* Determine which security state this SMC originated from */
+ secure_origin = is_caller_secure(flags);
+
+ switch (smc_fid) {
+ case ARM_SIP_SET_INTERRUPT_PENDING:
+ if (!secure_origin) {
+ SMC_RET1(handle, SMC_UNK);
+ }
+
+ VERBOSE("SiP Call- Set interrupt pending %d\n", (uint32_t)x1);
+ plat_ic_set_interrupt_pending(x1);
+
+ SMC_RET1(handle, SMC_OK);
+ break; /* Not reached */
+ default:
+ break;
+ }
+#endif
+
+#if ENABLE_SPMD_LP
+ return plat_spmd_logical_sp_smc_handler(smc_fid, x1, x2, x3, x4,
+ cookie, handle, flags);
+#else
+ WARN("Unimplemented ARM SiP Service Call: 0x%x\n", smc_fid);
+ SMC_RET1(handle, SMC_UNK);
+#endif
+}
diff --git a/plat/nuvoton/npcm845x/platform.mk b/plat/nuvoton/npcm845x/platform.mk
index 5120cc6..cb5a553 100644
--- a/plat/nuvoton/npcm845x/platform.mk
+++ b/plat/nuvoton/npcm845x/platform.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
#
# Copyright (c) 2017-2023 Nuvoton Ltd.
#
@@ -273,9 +273,11 @@
ifeq (${ARCH}, aarch64)
BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c \
plat/arm/common/arm_sip_svc.c \
+ plat/arm/common/plat_arm_sip_svc.c \
lib/pmf/pmf_smc.c
else
BL32_SOURCES += plat/arm/common/arm_sip_svc.c \
+ plat/arm/common/plat_arm_sip_svc.c \
lib/pmf/pmf_smc.c
endif
endif
diff --git a/plat/renesas/common/include/registers/cpg_registers.h b/plat/renesas/common/include/registers/cpg_registers.h
index 5d2bb9e..277f11b 100644
--- a/plat/renesas/common/include/registers/cpg_registers.h
+++ b/plat/renesas/common/include/registers/cpg_registers.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2021, Renesas Electronics Corporation. All rights reserved.
+ * Copyright (c) 2015-2023, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -16,7 +16,7 @@
#define CPG_SRCR2 (CPG_BASE + 0x00B0U)
/* CPG module stop status 2 */
#define CPG_MSTPSR2 (CPG_BASE + 0x0040U)
-/* CPG module stop status 2 */
+/* CPG module stop status 3 */
#define CPG_MSTPSR3 (CPG_BASE + 0x0048U)
/* CPG write protect */
#define CPG_CPGWPR (CPG_BASE + 0x0900U)
diff --git a/plat/st/common/common_rules.mk b/plat/st/common/common_rules.mk
index fa48dfc..f39caab 100644
--- a/plat/st/common/common_rules.mk
+++ b/plat/st/common/common_rules.mk
@@ -57,7 +57,11 @@
tf-a-%.elf: $(PLAT)-%.o ${STM32_TF_LINKERFILE}
@echo " LDS $<"
+ifneq ($(findstring gcc,$(notdir $(LD))),)
+ ${Q}${LD} -o $@ $(subst --,-Wl$(comma)--,${STM32_TF_ELF_LDFLAGS}) -nostartfiles -Wl,-Map=$(@:.elf=.map) -Wl,-dT ${STM32_TF_LINKERFILE} $<
+else
${Q}${LD} -o $@ ${STM32_TF_ELF_LDFLAGS} -Map=$(@:.elf=.map) --script ${STM32_TF_LINKERFILE} $<
+endif
tf-a-%.bin: tf-a-%.elf
${Q}${OC} -O binary $< $@
@@ -68,7 +72,7 @@
tf-a-%.stm32: tf-a-%.bin ${STM32_DEPS}
@echo
@echo "Generate $@"
- $(eval LOADADDR = $(shell cat $(@:.stm32=.map) | grep RAM | awk '{print $$2}'))
+ $(eval LOADADDR = $(shell cat $(@:.stm32=.map) | grep '^RAM' | awk '{print $$2}'))
$(eval ENTRY = $(shell cat $(@:.stm32=.map) | grep "__BL2_IMAGE_START" | awk '{print $$1}'))
${Q}${STM32IMAGE} -s $< -d $@ \
-l $(LOADADDR) -e ${ENTRY} \
diff --git a/services/std_svc/errata_abi/errata_abi_main.c b/services/std_svc/errata_abi/errata_abi_main.c
index c0a089b..abb86c7 100644
--- a/services/std_svc/errata_abi/errata_abi_main.c
+++ b/services/std_svc/errata_abi/errata_abi_main.c
@@ -384,15 +384,16 @@
[0] = {1922240, 0x00, 0x00, ERRATA_A510_1922240},
[1] = {2041909, 0x02, 0x02, ERRATA_A510_2041909},
[2] = {2042739, 0x00, 0x02, ERRATA_A510_2042739},
- [3] = {2172148, 0x00, 0x10, ERRATA_A510_2172148},
- [4] = {2218950, 0x00, 0x10, ERRATA_A510_2218950},
- [5] = {2250311, 0x00, 0x10, ERRATA_A510_2250311},
- [6] = {2288014, 0x00, 0x10, ERRATA_A510_2288014},
- [7] = {2347730, 0x00, 0x11, ERRATA_A510_2347730},
- [8] = {2371937, 0x00, 0x11, ERRATA_A510_2371937},
- [9] = {2666669, 0x00, 0x11, ERRATA_A510_2666669},
- [10] = {2684597, 0x00, 0x12, ERRATA_A510_2684597},
- [11 ... ERRATA_LIST_END] = UNDEF_ERRATA,
+ [3] = {2080326, 0x02, 0x02, ERRATA_A510_2080326},
+ [4] = {2172148, 0x00, 0x10, ERRATA_A510_2172148},
+ [5] = {2218950, 0x00, 0x10, ERRATA_A510_2218950},
+ [6] = {2250311, 0x00, 0x10, ERRATA_A510_2250311},
+ [7] = {2288014, 0x00, 0x10, ERRATA_A510_2288014},
+ [8] = {2347730, 0x00, 0x11, ERRATA_A510_2347730},
+ [9] = {2371937, 0x00, 0x11, ERRATA_A510_2371937},
+ [10] = {2666669, 0x00, 0x11, ERRATA_A510_2666669},
+ [11] = {2684597, 0x00, 0x12, ERRATA_A510_2684597},
+ [12 ... ERRATA_LIST_END] = UNDEF_ERRATA,
}
},
#endif /* CORTEX_A510_H_INC */
diff --git a/tools/cert_create/include/key.h b/tools/cert_create/include/key.h
index 56f1c21..e0ecdae 100644
--- a/tools/cert_create/include/key.h
+++ b/tools/cert_create/include/key.h
@@ -74,7 +74,7 @@
int key_new(key_t *key);
#endif
int key_create(key_t *key, int type, int key_bits);
-int key_load(key_t *key, unsigned int *err_code);
+unsigned int key_load(key_t *key);
int key_store(key_t *key);
void key_cleanup(void);
diff --git a/tools/cert_create/src/key.c b/tools/cert_create/src/key.c
index 14c8e18..04214aa 100644
--- a/tools/cert_create/src/key.c
+++ b/tools/cert_create/src/key.c
@@ -239,38 +239,34 @@
}
-int key_load(key_t *key, unsigned int *err_code)
+unsigned int key_load(key_t *key)
{
- FILE *fp;
+ if (key->fn == NULL) {
+ VERBOSE("Key not specified\n");
+ return KEY_ERR_FILENAME;
+ }
- if (key->fn) {
- if (!strncmp(key->fn, "pkcs11:", 7)) {
- /* Load key through pkcs11 */
- key->key = key_load_pkcs11(key->fn);
- } else {
- /* Load key from file */
- fp = fopen(key->fn, "r");
- if (fp) {
- key->key = PEM_read_PrivateKey(fp, NULL, NULL, NULL);
- fclose(fp);
- } else {
- WARN("Cannot open file %s\n", key->fn);
- *err_code = KEY_ERR_OPEN;
- }
- }
- if (key->key) {
- *err_code = KEY_ERR_NONE;
- return 1;
- } else {
- ERROR("Cannot load key from %s\n", key->fn);
- *err_code = KEY_ERR_LOAD;
- }
+ if (strncmp(key->fn, "pkcs11:", 7) == 0) {
+ /* Load key through pkcs11 */
+ key->key = key_load_pkcs11(key->fn);
} else {
- VERBOSE("Key not specified\n");
- *err_code = KEY_ERR_FILENAME;
+ /* Load key from file */
+ FILE *fp = fopen(key->fn, "r");
+ if (fp == NULL) {
+ WARN("Cannot open file %s\n", key->fn);
+ return KEY_ERR_OPEN;
+ }
+
+ key->key = PEM_read_PrivateKey(fp, NULL, NULL, NULL);
+ fclose(fp);
+ }
+
+ if (key->key == NULL) {
+ ERROR("Cannot load key from %s\n", key->fn);
+ return KEY_ERR_LOAD;
}
- return 0;
+ return KEY_ERR_NONE;
}
int key_store(key_t *key)
diff --git a/tools/cert_create/src/main.c b/tools/cert_create/src/main.c
index 2ab6bcf..f10a768 100644
--- a/tools/cert_create/src/main.c
+++ b/tools/cert_create/src/main.c
@@ -441,7 +441,8 @@
#endif
/* First try to load the key from disk */
- if (key_load(&keys[i], &err_code)) {
+ err_code = key_load(&keys[i]);
+ if (err_code == KEY_ERR_NONE) {
/* Key loaded successfully */
continue;
}