tree 54bb99a2b9cfa19767ed70727934129ce82cc314
parent 665ee6c6517261f8f0912808c4abb6edfeb4d5c3
author Patrick Delaunay <patrick.delaunay@foss.st.com> 1647339656 +0100
committer Yann Gautier <yann.gautier@st.com> 1663939063 +0200

feat(stm32mp1): configure the serial boot load address

For product with 128MB DDR size, the OP-TEE is located at the end
of the DDR and the FIP can't be loaded at the default location
because it overlap the OP-TEE final location. So the default value
for DWL_BUFFER_BASE is invalid.

To avoid this conflict the serial boot load address = DWL_BUFFER_BASE
can be modified with a configuration flags.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ie27b87c10c57fea5d4c6200ce4f624e775b9a080